[PATCH] drm/amdgpu/smu10: fix SoC/fclk units in auto mode

[Alex Deucher]

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On Fri, Apr 1, 2022 at 11:16 AM Alex Deucher <alexander.deucher at amd.com> wrote:
>
> SMU takes clock limits in Mhz units.  socclk and fclk were
> using 10 khz units in some cases.  Switch to Mhz units.
> Fixes higher than required SoC clocks.
>
> Fixes: 97cf32996c46d9 ("drm/amd/pm: Removed fixed clock in auto mode DPM")
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
>  drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
> index 9ddd8491ff00..545dd68a8c18 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu10_hwmgr.c
> @@ -773,13 +773,13 @@ static int smu10_dpm_force_dpm_level(struct pp_hwmgr *hwmgr,
>                 smum_send_msg_to_smc_with_parameter(hwmgr,
>                                                 PPSMC_MSG_SetHardMinFclkByFreq,
>                                                 hwmgr->display_config->num_display > 3 ?
> -                                               data->clock_vol_info.vdd_dep_on_fclk->entries[0].clk :
> +                                                   (data->clock_vol_info.vdd_dep_on_fclk->entries[0].clk / 100) :
>                                                 min_mclk,
>                                                 NULL);
>
>                 smum_send_msg_to_smc_with_parameter(hwmgr,
>                                                 PPSMC_MSG_SetHardMinSocclkByFreq,
> -                                               data->clock_vol_info.vdd_dep_on_socclk->entries[0].clk,
> +                                               data->clock_vol_info.vdd_dep_on_socclk->entries[0].clk / 100,
>                                                 NULL);
>                 smum_send_msg_to_smc_with_parameter(hwmgr,
>                                                 PPSMC_MSG_SetHardMinVcn,
> @@ -792,11 +792,11 @@ static int smu10_dpm_force_dpm_level(struct pp_hwmgr *hwmgr,
>                                                 NULL);
>                 smum_send_msg_to_smc_with_parameter(hwmgr,
>                                                 PPSMC_MSG_SetSoftMaxFclkByFreq,
> -                                               data->clock_vol_info.vdd_dep_on_fclk->entries[index_fclk].clk,
> +                                               data->clock_vol_info.vdd_dep_on_fclk->entries[index_fclk].clk / 100,
>                                                 NULL);
>                 smum_send_msg_to_smc_with_parameter(hwmgr,
>                                                 PPSMC_MSG_SetSoftMaxSocclkByFreq,
> -                                               data->clock_vol_info.vdd_dep_on_socclk->entries[index_socclk].clk,
> +                                               data->clock_vol_info.vdd_dep_on_socclk->entries[index_socclk].clk / 100,
>                                                 NULL);
>                 smum_send_msg_to_smc_with_parameter(hwmgr,
>                                                 PPSMC_MSG_SetSoftMaxVcn,
> --
> 2.35.1
>