[PATCH 02/20] drm/amd/display: do not wait for mpc idle if tg is disabled

Paul Menzel pmenzel at molgen.mpg.de
Sat Apr 9 19:21:28 UTC 2022


Dear Pavle,


Thank you for the patch.

Am 08.04.22 um 19:18 schrieb Pavle Kotarac:
> From: Josip Pavic <Josip.Pavic at amd.com>
> 
> [Why]
> When booting, the driver waits for the MPC idle bit to be set as part of
> pipe initialization. However, on some systems this occurs before OTG is
> enabled, and since the MPC idle bit won't be set until the vupdate
> signal occurs (which requires OTG to be enabled), this never happens and
> the wait times out. This can add hundreds of milliseconds to the boot
> time.

Please list one specific system, where OTG is enabled later.

> 
> [How]
> Do not wait for mpc idle if tg is disabled

Please add a dot/period at the end of sentences.

> Reviewed-by: Jun Lei <Jun.Lei at amd.com>
> Acked-by: Pavle Kotarac <Pavle.Kotarac at amd.com>
> Signed-off-by: Josip Pavic <Josip.Pavic at amd.com>
> ---
>   drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
> index 50820e79d3c4..2d3d870f0bea 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
> @@ -3185,7 +3185,8 @@ void dcn10_wait_for_mpcc_disconnect(
>   		if (pipe_ctx->stream_res.opp->mpcc_disconnect_pending[mpcc_inst]) {
>   			struct hubp *hubp = get_hubp_by_inst(res_pool, mpcc_inst);
>   
> -			res_pool->mpc->funcs->wait_for_idle(res_pool->mpc, mpcc_inst);
> +			if (pipe_ctx->stream_res.tg->funcs->is_tg_enabled(pipe_ctx->stream_res.tg))
> +				res_pool->mpc->funcs->wait_for_idle(res_pool->mpc, mpcc_inst);
>   			pipe_ctx->stream_res.opp->mpcc_disconnect_pending[mpcc_inst] = false;
>   			hubp->funcs->set_blank(hubp, true);
>   		}


Kind regards,

Paul


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