[PATCH v2] Revert "drm/amd/display: Pass HostVM enable flag into DCN3.1 DML"

Alex Deucher alexdeucher at gmail.com
Wed Apr 13 13:21:03 UTC 2022


On Tue, Apr 12, 2022 at 5:03 PM Rodrigo Siqueira
<Rodrigo.Siqueira at amd.com> wrote:
>
> This reverts commit 367b3e934f578f6c0d5d8ca5987dc6ac4cd6831d.
>
> While we were testing DCN3.1 with a hub, we noticed that only one of 2
> connected displays lights up when using some specific display
> resolution. In summary, this was the setup:
>
> 1. Displays:
>  * Sharp LQ156M1JW26 (eDP): 1080 at 240
>  * BENQ SW320 (DP): 4k at 60
>  * BENQ EX3203R (DP): 4k at 60
> 2. Hub: Club3D CSV-7300
> 3. ASIC: DCN3.1
>
> After bisecting this issue, we figured out the commit mentioned above
> introduced this issue. We are investigating why this patch introduced
> this regression, but we need to revert it for now.
>
> Cc: Harry Wentland <harry.wentland at amd.com>
> Cc: Mark Broadworth <Mark.Broadworth at amd.com>
> Cc: Michael Strauss <michael.strauss at amd.com>
> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira at amd.com>

Acked-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c | 1 -
>  1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
> index 6cc580be7c79..5b3f0c2dfb55 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
> @@ -1668,7 +1668,6 @@ int dcn31_populate_dml_pipes_from_context(
>                 pipes[pipe_cnt].pipe.src.immediate_flip = true;
>
>                 pipes[pipe_cnt].pipe.src.unbounded_req_mode = false;
> -               pipes[pipe_cnt].pipe.src.hostvm = dc->res_pool->hubbub->riommu_active;
>                 pipes[pipe_cnt].pipe.src.gpuvm = true;
>                 pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_luma = 0;
>                 pipes[pipe_cnt].pipe.src.dcc_fraction_of_zs_req_chroma = 0;
> --
> 2.25.1
>


More information about the amd-gfx mailing list