[PATCH 1/2] drm/amdgpu: Use indirect buffer and save response status for TA load/invoke

Li, Candice Candice.Li at amd.com
Tue Apr 19 00:48:28 UTC 2022


[Public]

Thanks for the review, I have added the change back and will submit a new one if needed.

The upcoming TA debugfs interface needs to use indirect buffer
when performing TA invoke and check psp response status for TA
load and invoke.

Signed-off-by: John Clements <john.clements at amd.com>
Signed-off-by: Candice Li <candice.li at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 54 +++++++++++++++++++++----
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 26 ++++++++++++
 2 files changed, 72 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index a6acec1a6155d0..f6527aa19238a8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -46,8 +46,6 @@ static int psp_sysfs_init(struct amdgpu_device *adev);
 static void psp_sysfs_fini(struct amdgpu_device *adev);
 
 static int psp_load_smu_fw(struct psp_context *psp);
-static int psp_ta_unload(struct psp_context *psp, struct ta_context *context);
-static int psp_ta_load(struct psp_context *psp, struct ta_context *context);
 static int psp_rap_terminate(struct psp_context *psp);
 static int psp_securedisplay_terminate(struct psp_context *psp);
 
@@ -862,7 +860,7 @@ static void psp_prep_ta_unload_cmd_buf(struct psp_gfx_cmd_resp *cmd,
 	cmd->cmd.cmd_unload_ta.session_id = session_id;
 }
 
-static int psp_ta_unload(struct psp_context *psp, struct ta_context *context)
+int psp_ta_unload(struct psp_context *psp, struct ta_context *context)
 {
 	int ret;
 	struct psp_gfx_cmd_resp *cmd = acquire_psp_cmd_buf(psp);
@@ -944,7 +942,7 @@ static void psp_prep_ta_load_cmd_buf(struct psp_gfx_cmd_resp *cmd,
 	cmd->cmd.cmd_load_ta.cmd_buf_len = context->mem_context.shared_mem_size;
 }
 
-static int psp_ta_init_shared_buf(struct psp_context *psp,
+int psp_ta_init_shared_buf(struct psp_context *psp,
 				  struct ta_mem_context *mem_ctx)
 {
 	/*
@@ -958,7 +956,7 @@ static int psp_ta_init_shared_buf(struct psp_context *psp,
 				      &mem_ctx->shared_buf);
 }
 
-static void psp_ta_free_shared_buf(struct ta_mem_context *mem_ctx)
+void psp_ta_free_shared_buf(struct ta_mem_context *mem_ctx)
 {
 	amdgpu_bo_free_kernel(&mem_ctx->shared_bo, &mem_ctx->shared_mc_addr,
 			      &mem_ctx->shared_buf);
@@ -969,6 +967,42 @@ static int psp_xgmi_init_shared_buf(struct psp_context *psp)
 	return psp_ta_init_shared_buf(psp, &psp->xgmi_context.context.mem_context);
 }
 
+static void psp_prep_ta_invoke_indirect_cmd_buf(struct psp_gfx_cmd_resp *cmd,
+				       uint32_t ta_cmd_id,
+				       struct ta_context *context)
+{
+	cmd->cmd_id                         = GFX_CMD_ID_INVOKE_CMD;
+	cmd->cmd.cmd_invoke_cmd.session_id  = context->session_id;
+	cmd->cmd.cmd_invoke_cmd.ta_cmd_id   = ta_cmd_id;
+
+	cmd->cmd.cmd_invoke_cmd.buf.num_desc   = 1;
+	cmd->cmd.cmd_invoke_cmd.buf.total_size = context->mem_context.shared_mem_size;
+	cmd->cmd.cmd_invoke_cmd.buf.buf_desc[0].buf_size = context->mem_context.shared_mem_size;
+	cmd->cmd.cmd_invoke_cmd.buf.buf_desc[0].buf_phy_addr_lo =
+				     lower_32_bits(context->mem_context.shared_mc_addr);
+	cmd->cmd.cmd_invoke_cmd.buf.buf_desc[0].buf_phy_addr_hi =
+				     upper_32_bits(context->mem_context.shared_mc_addr);
+}
+
+int psp_ta_invoke_indirect(struct psp_context *psp,
+		  uint32_t ta_cmd_id,
+		  struct ta_context *context)
+{
+	int ret;
+	struct psp_gfx_cmd_resp *cmd = acquire_psp_cmd_buf(psp);
+
+	psp_prep_ta_invoke_indirect_cmd_buf(cmd, ta_cmd_id, context);
+
+	ret = psp_cmd_submit_buf(psp, NULL, cmd,
+				 psp->fence_buf_mc_addr);
+
+	context->resp_status = cmd->resp.status;
+
+	release_psp_cmd_buf(psp);
+
+	return ret;
+}
+
 static void psp_prep_ta_invoke_cmd_buf(struct psp_gfx_cmd_resp *cmd,
 				       uint32_t ta_cmd_id,
 				       uint32_t session_id)
@@ -978,7 +1012,7 @@ static void psp_prep_ta_invoke_cmd_buf(struct psp_gfx_cmd_resp *cmd,
 	cmd->cmd.cmd_invoke_cmd.ta_cmd_id	= ta_cmd_id;
 }
 
-static int psp_ta_invoke(struct psp_context *psp,
+int psp_ta_invoke(struct psp_context *psp,
 		  uint32_t ta_cmd_id,
 		  struct ta_context *context)
 {
@@ -990,12 +1024,14 @@ static int psp_ta_invoke(struct psp_context *psp,
 	ret = psp_cmd_submit_buf(psp, NULL, cmd,
 				 psp->fence_buf_mc_addr);
 
+	context->resp_status = cmd->resp.status;
+
 	release_psp_cmd_buf(psp);
 
 	return ret;
 }
 
-static int psp_ta_load(struct psp_context *psp, struct ta_context *context)
+int psp_ta_load(struct psp_context *psp, struct ta_context *context)
 {
 	int ret;
 	struct psp_gfx_cmd_resp *cmd;
@@ -1010,6 +1046,8 @@ static int psp_ta_load(struct psp_context *psp, struct ta_context *context)
 	ret = psp_cmd_submit_buf(psp, NULL, cmd,
 				 psp->fence_buf_mc_addr);
 
+	context->resp_status = cmd->resp.status;
+
 	if (!ret) {
 		context->session_id = cmd->resp.session_id;
 	}
@@ -1415,7 +1453,7 @@ int psp_ras_enable_features(struct psp_context *psp,
 	return 0;
 }
 
-static int psp_ras_terminate(struct psp_context *psp)
+int psp_ras_terminate(struct psp_context *psp)
 {
 	int ret;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
index ff7d533eb746ce..cf8d3199b35bf0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
@@ -48,6 +48,17 @@ enum psp_shared_mem_size {
 	PSP_SECUREDISPLAY_SHARED_MEM_SIZE	= 0x4000,
 };
 
+enum ta_type_id {
+	TA_TYPE_XGMI = 1,
+	TA_TYPE_RAS,
+	TA_TYPE_HDCP,
+	TA_TYPE_DTM,
+	TA_TYPE_RAP,
+	TA_TYPE_SECUREDISPLAY,
+
+	TA_TYPE_MAX_INDEX,
+};
+
 struct psp_context;
 struct psp_xgmi_node_info;
 struct psp_xgmi_topology_info;
@@ -151,9 +162,11 @@ struct ta_mem_context {
 struct ta_context {
 	bool			initialized;
 	uint32_t		session_id;
+	uint32_t		resp_status;
 	struct ta_mem_context	mem_context;
 	struct psp_bin_desc		bin_desc;
 	enum psp_gfx_cmd_id		ta_load_type;
+	enum ta_type_id		ta_type;
 };
 
 struct ta_cp_context {
@@ -407,6 +420,18 @@ int psp_gpu_reset(struct amdgpu_device *adev);
 int psp_update_vcn_sram(struct amdgpu_device *adev, int inst_idx,
 			uint64_t cmd_gpu_addr, int cmd_size);
 
+int psp_ta_init_shared_buf(struct psp_context *psp,
+				  struct ta_mem_context *mem_ctx);
+void psp_ta_free_shared_buf(struct ta_mem_context *mem_ctx);
+int psp_ta_unload(struct psp_context *psp, struct ta_context *context);
+int psp_ta_load(struct psp_context *psp, struct ta_context *context);
+int psp_ta_invoke(struct psp_context *psp,
+			uint32_t ta_cmd_id,
+			struct ta_context *context);
+int psp_ta_invoke_indirect(struct psp_context *psp,
+		  uint32_t ta_cmd_id,
+		  struct ta_context *context);
+
 int psp_xgmi_initialize(struct psp_context *psp, bool set_extended_data, bool load_ta);
 int psp_xgmi_terminate(struct psp_context *psp);
 int psp_xgmi_invoke(struct psp_context *psp, uint32_t ta_cmd_id);
@@ -425,6 +450,7 @@ int psp_ras_enable_features(struct psp_context *psp,
 		union ta_ras_cmd_input *info, bool enable);
 int psp_ras_trigger_error(struct psp_context *psp,
 			  struct ta_ras_trigger_error_input *info);
+int psp_ras_terminate(struct psp_context *psp);
 
 int psp_hdcp_invoke(struct psp_context *psp, uint32_t ta_cmd_id);
 int psp_dtm_invoke(struct psp_context *psp, uint32_t ta_cmd_id);
-- 
2.17.1


Thanks,
Candice

-----Original Message-----
From: Zhou1, Tao <Tao.Zhou1 at amd.com> 
Sent: Monday, April 18, 2022 11:56 AM
To: Li, Candice <Candice.Li at amd.com>; amd-gfx at lists.freedesktop.org
Cc: Li, Candice <Candice.Li at amd.com>; Clements, John <John.Clements at amd.com>
Subject: RE: [PATCH 1/2] drm/amdgpu: Use indirect buffer and save response status for TA load/invoke

[AMD Official Use Only]



> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Candice
> Li
> Sent: Monday, April 18, 2022 11:09 AM
> To: amd-gfx at lists.freedesktop.org
> Cc: Li, Candice <Candice.Li at amd.com>; Clements, John
> <John.Clements at amd.com>
> Subject: [PATCH 1/2] drm/amdgpu: Use indirect buffer and save response status
> for TA load/invoke
> 
> The upcoming TA debugfs interface needs to use indirect buffer when
> performing TA invoke and check psp response status for TA load and invoke.
> 
> Signed-off-by: John Clements <john.clements at amd.com>
> Signed-off-by: Candice Li <candice.li at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 60 +++++++++++++++++++------
> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 26 +++++++++++
>  2 files changed, 72 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> index a6acec1a6155d0..cb7e081b1ef426 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> @@ -46,8 +46,6 @@ static int psp_sysfs_init(struct amdgpu_device *adev);
> static void psp_sysfs_fini(struct amdgpu_device *adev);
> 
>  static int psp_load_smu_fw(struct psp_context *psp); -static int
> psp_ta_unload(struct psp_context *psp, struct ta_context *context); -static int
> psp_ta_load(struct psp_context *psp, struct ta_context *context);  static int
> psp_rap_terminate(struct psp_context *psp);  static int
> psp_securedisplay_terminate(struct psp_context *psp);
> 
> @@ -862,7 +860,7 @@ static void psp_prep_ta_unload_cmd_buf(struct
> psp_gfx_cmd_resp *cmd,
>  	cmd->cmd.cmd_unload_ta.session_id = session_id;  }
> 
> -static int psp_ta_unload(struct psp_context *psp, struct ta_context *context)
> +int psp_ta_unload(struct psp_context *psp, struct ta_context *context)
>  {
>  	int ret;
>  	struct psp_gfx_cmd_resp *cmd = acquire_psp_cmd_buf(psp); @@ -
> 944,7 +942,7 @@ static void psp_prep_ta_load_cmd_buf(struct
> psp_gfx_cmd_resp *cmd,
>  	cmd->cmd.cmd_load_ta.cmd_buf_len = context-
> >mem_context.shared_mem_size;
>  }
> 
> -static int psp_ta_init_shared_buf(struct psp_context *psp,
> +int psp_ta_init_shared_buf(struct psp_context *psp,
>  				  struct ta_mem_context *mem_ctx)
>  {
>  	/*
> @@ -958,7 +956,7 @@ static int psp_ta_init_shared_buf(struct psp_context
> *psp,
>  				      &mem_ctx->shared_buf);
>  }
> 
> -static void psp_ta_free_shared_buf(struct ta_mem_context *mem_ctx)
> +void psp_ta_free_shared_buf(struct ta_mem_context *mem_ctx)
>  {
>  	amdgpu_bo_free_kernel(&mem_ctx->shared_bo, &mem_ctx-
> >shared_mc_addr,
>  			      &mem_ctx->shared_buf);
> @@ -969,6 +967,42 @@ static int psp_xgmi_init_shared_buf(struct psp_context
> *psp)
>  	return psp_ta_init_shared_buf(psp, &psp-
> >xgmi_context.context.mem_context);
>  }
> 
> +static void psp_prep_ta_invoke_indirect_cmd_buf(struct psp_gfx_cmd_resp
> *cmd,
> +				       uint32_t ta_cmd_id,
> +				       struct ta_context *context)
> +{
> +	cmd->cmd_id                         = GFX_CMD_ID_INVOKE_CMD;
> +	cmd->cmd.cmd_invoke_cmd.session_id  = context->session_id;
> +	cmd->cmd.cmd_invoke_cmd.ta_cmd_id   = ta_cmd_id;
> +
> +	cmd->cmd.cmd_invoke_cmd.buf.num_desc   = 1;
> +	cmd->cmd.cmd_invoke_cmd.buf.total_size = context-
> >mem_context.shared_mem_size;
> +	cmd->cmd.cmd_invoke_cmd.buf.buf_desc[0].buf_size = context-
> >mem_context.shared_mem_size;
> +	cmd->cmd.cmd_invoke_cmd.buf.buf_desc[0].buf_phy_addr_lo =
> +				     lower_32_bits(context-
> >mem_context.shared_mc_addr);
> +	cmd->cmd.cmd_invoke_cmd.buf.buf_desc[0].buf_phy_addr_hi =
> +				     upper_32_bits(context-
> >mem_context.shared_mc_addr);
> +}
> +
> +int psp_ta_invoke_indirect(struct psp_context *psp,
> +		  uint32_t ta_cmd_id,
> +		  struct ta_context *context)
> +{
> +	int ret;
> +	struct psp_gfx_cmd_resp *cmd = acquire_psp_cmd_buf(psp);
> +
> +	psp_prep_ta_invoke_indirect_cmd_buf(cmd, ta_cmd_id, context);
> +
> +	ret = psp_cmd_submit_buf(psp, NULL, cmd,
> +				 psp->fence_buf_mc_addr);
> +
> +	context->resp_status = cmd->resp.status;
> +
> +	release_psp_cmd_buf(psp);
> +
> +	return ret;
> +}
> +
>  static void psp_prep_ta_invoke_cmd_buf(struct psp_gfx_cmd_resp *cmd,
>  				       uint32_t ta_cmd_id,
>  				       uint32_t session_id)
> @@ -978,7 +1012,7 @@ static void psp_prep_ta_invoke_cmd_buf(struct
> psp_gfx_cmd_resp *cmd,
>  	cmd->cmd.cmd_invoke_cmd.ta_cmd_id	= ta_cmd_id;
>  }
> 
> -static int psp_ta_invoke(struct psp_context *psp,
> +int psp_ta_invoke(struct psp_context *psp,
>  		  uint32_t ta_cmd_id,
>  		  struct ta_context *context)
>  {
> @@ -990,12 +1024,14 @@ static int psp_ta_invoke(struct psp_context *psp,
>  	ret = psp_cmd_submit_buf(psp, NULL, cmd,
>  				 psp->fence_buf_mc_addr);
> 
> +	context->resp_status = cmd->resp.status;
> +
>  	release_psp_cmd_buf(psp);
> 
>  	return ret;
>  }
> 
> -static int psp_ta_load(struct psp_context *psp, struct ta_context *context)
> +int psp_ta_load(struct psp_context *psp, struct ta_context *context)
>  {
>  	int ret;
>  	struct psp_gfx_cmd_resp *cmd;
> @@ -1010,6 +1046,8 @@ static int psp_ta_load(struct psp_context *psp, struct
> ta_context *context)
>  	ret = psp_cmd_submit_buf(psp, NULL, cmd,
>  				 psp->fence_buf_mc_addr);
> 
> +	context->resp_status = cmd->resp.status;
> +
>  	if (!ret) {
>  		context->session_id = cmd->resp.session_id;
>  	}
> @@ -1415,16 +1453,10 @@ int psp_ras_enable_features(struct psp_context
> *psp,
>  	return 0;
>  }
> 
> -static int psp_ras_terminate(struct psp_context *psp)
> +int psp_ras_terminate(struct psp_context *psp)
>  {
>  	int ret;
> 
> -	/*
> -	 * TODO: bypass the terminate in sriov for now
> -	 */
> -	if (amdgpu_sriov_vf(psp->adev))
> -		return 0;
> -

[Tao] it seems the change is unrelated to the patch.

>  	if (!psp->ras_context.context.initialized)
>  		return 0;
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
> index ff7d533eb746ce..cf8d3199b35bf0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
> @@ -48,6 +48,17 @@ enum psp_shared_mem_size {
>  	PSP_SECUREDISPLAY_SHARED_MEM_SIZE	= 0x4000,
>  };
> 
> +enum ta_type_id {
> +	TA_TYPE_XGMI = 1,
> +	TA_TYPE_RAS,
> +	TA_TYPE_HDCP,
> +	TA_TYPE_DTM,
> +	TA_TYPE_RAP,
> +	TA_TYPE_SECUREDISPLAY,
> +
> +	TA_TYPE_MAX_INDEX,
> +};
> +
>  struct psp_context;
>  struct psp_xgmi_node_info;
>  struct psp_xgmi_topology_info;
> @@ -151,9 +162,11 @@ struct ta_mem_context {  struct ta_context {
>  	bool			initialized;
>  	uint32_t		session_id;
> +	uint32_t		resp_status;
>  	struct ta_mem_context	mem_context;
>  	struct psp_bin_desc		bin_desc;
>  	enum psp_gfx_cmd_id		ta_load_type;
> +	enum ta_type_id		ta_type;
>  };
> 
>  struct ta_cp_context {
> @@ -407,6 +420,18 @@ int psp_gpu_reset(struct amdgpu_device *adev);  int
> psp_update_vcn_sram(struct amdgpu_device *adev, int inst_idx,
>  			uint64_t cmd_gpu_addr, int cmd_size);
> 
> +int psp_ta_init_shared_buf(struct psp_context *psp,
> +				  struct ta_mem_context *mem_ctx);
> +void psp_ta_free_shared_buf(struct ta_mem_context *mem_ctx); int
> +psp_ta_unload(struct psp_context *psp, struct ta_context *context); int
> +psp_ta_load(struct psp_context *psp, struct ta_context *context); int
> +psp_ta_invoke(struct psp_context *psp,
> +			uint32_t ta_cmd_id,
> +			struct ta_context *context);
> +int psp_ta_invoke_indirect(struct psp_context *psp,
> +		  uint32_t ta_cmd_id,
> +		  struct ta_context *context);
> +
>  int psp_xgmi_initialize(struct psp_context *psp, bool set_extended_data, bool
> load_ta);  int psp_xgmi_terminate(struct psp_context *psp);  int
> psp_xgmi_invoke(struct psp_context *psp, uint32_t ta_cmd_id); @@ -425,6
> +450,7 @@ int psp_ras_enable_features(struct psp_context *psp,
>  		union ta_ras_cmd_input *info, bool enable);  int
> psp_ras_trigger_error(struct psp_context *psp,
>  			  struct ta_ras_trigger_error_input *info);
> +int psp_ras_terminate(struct psp_context *psp);
> 
>  int psp_hdcp_invoke(struct psp_context *psp, uint32_t ta_cmd_id);  int
> psp_dtm_invoke(struct psp_context *psp, uint32_t ta_cmd_id);
> --
> 2.17.1


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