[PATCH 2/3 v3] drm/amd/amdgpu: Properly indent PF2VF header
Alex Deucher
alexdeucher at gmail.com
Thu Apr 21 17:07:13 UTC 2022
On Wed, Apr 20, 2022 at 6:47 PM Bokun Zhang <Bokun.Zhang at amd.com> wrote:
>
> - Clean up the identation in the header file
>
> Signed-off-by: Bokun Zhang <Bokun.Zhang at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h | 70 ++++++++++-----------
> 1 file changed, 34 insertions(+), 36 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h b/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h
> index 059be32638ac..65433cbb00c5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h
> @@ -24,10 +24,10 @@
> #define AMDGV_SRIOV_MSG__H_
>
> /* unit in kilobytes */
> -#define AMD_SRIOV_MSG_VBIOS_OFFSET 0
> -#define AMD_SRIOV_MSG_VBIOS_SIZE_KB 64
> -#define AMD_SRIOV_MSG_DATAEXCHANGE_OFFSET_KB AMD_SRIOV_MSG_VBIOS_SIZE_KB
> -#define AMD_SRIOV_MSG_DATAEXCHANGE_SIZE_KB 4
> +#define AMD_SRIOV_MSG_VBIOS_OFFSET 0
> +#define AMD_SRIOV_MSG_VBIOS_SIZE_KB 64
> +#define AMD_SRIOV_MSG_DATAEXCHANGE_OFFSET_KB AMD_SRIOV_MSG_VBIOS_SIZE_KB
> +#define AMD_SRIOV_MSG_DATAEXCHANGE_SIZE_KB 4
>
> /*
> * layout
> @@ -50,10 +50,10 @@
> * v2 defined in amdgim
> * v3 current
> */
> -#define AMD_SRIOV_MSG_FW_VRAM_PF2VF_VER 2
> -#define AMD_SRIOV_MSG_FW_VRAM_VF2PF_VER 3
> +#define AMD_SRIOV_MSG_FW_VRAM_PF2VF_VER 2
> +#define AMD_SRIOV_MSG_FW_VRAM_VF2PF_VER 3
>
> -#define AMD_SRIOV_MSG_RESERVE_UCODE 24
> +#define AMD_SRIOV_MSG_RESERVE_UCODE 24
>
> #define AMD_SRIOV_MSG_RESERVE_VCN_INST 4
>
> @@ -82,19 +82,19 @@ enum amd_sriov_ucode_engine_id {
> AMD_SRIOV_UCODE_ID__MAX
> };
>
> -#pragma pack(push, 1) // PF2VF / VF2PF data areas are byte packed
> +#pragma pack(push, 1) // PF2VF / VF2PF data areas are byte packed
>
> union amd_sriov_msg_feature_flags {
> struct {
> - uint32_t error_log_collect : 1;
> - uint32_t host_load_ucodes : 1;
> - uint32_t host_flr_vramlost : 1;
> - uint32_t mm_bw_management : 1;
> - uint32_t pp_one_vf_mode : 1;
> - uint32_t reg_indirect_acc : 1;
> - uint32_t reserved : 26;
> + uint32_t error_log_collect : 1;
> + uint32_t host_load_ucodes : 1;
> + uint32_t host_flr_vramlost : 1;
> + uint32_t mm_bw_management : 1;
> + uint32_t pp_one_vf_mode : 1;
> + uint32_t reg_indirect_acc : 1;
> + uint32_t reserved : 26;
> } flags;
> - uint32_t all;
> + uint32_t all;
> };
>
> union amd_sriov_reg_access_flags {
> @@ -109,10 +109,10 @@ union amd_sriov_reg_access_flags {
>
> union amd_sriov_msg_os_info {
> struct {
> - uint32_t windows : 1;
> - uint32_t reserved : 31;
> + uint32_t windows : 1;
> + uint32_t reserved : 31;
> } info;
> - uint32_t all;
> + uint32_t all;
> };
>
> struct amd_sriov_msg_uuid_info {
> @@ -203,7 +203,7 @@ struct amd_sriov_msg_pf2vf_info {
> } mm_bw_management[AMD_SRIOV_MSG_RESERVE_VCN_INST];
> /* UUID info */
> struct amd_sriov_msg_uuid_info uuid_info;
> - /* pcie atomic Ops info */
> + /* PCIE atomic ops support flag */
> uint32_t pcie_atomic_ops_enabled_flags;
> /* reserved */
> uint32_t reserved[256 - 48];
> @@ -223,7 +223,7 @@ struct amd_sriov_msg_vf2pf_info {
> struct amd_sriov_msg_vf2pf_info_header header;
> uint32_t checksum;
> /* driver version */
> - uint8_t driver_version[64];
> + uint8_t driver_version[64];
> /* driver certification, 1=WHQL, 0=None */
> uint32_t driver_cert;
> /* guest OS type and version */
> @@ -257,13 +257,14 @@ struct amd_sriov_msg_vf2pf_info {
> uint32_t fb_size;
> /* guest ucode data, each one is 1.25 Dword */
> struct {
> - uint8_t id;
> + uint8_t id;
> uint32_t version;
> } ucode_info[AMD_SRIOV_MSG_RESERVE_UCODE];
> + /* dummy page addr */
> uint64_t dummy_page_addr;
>
> /* reserved */
> - uint32_t reserved[256-70];
> + uint32_t reserved[256 - 70];
> };
>
> /* mailbox message send from guest to host */
> @@ -275,7 +276,8 @@ enum amd_sriov_mailbox_request_message {
> MB_REQ_MSG_REQ_GPU_RESET_ACCESS,
> MB_REQ_MSG_REQ_GPU_INIT_DATA,
>
> - MB_REQ_MSG_LOG_VF_ERROR = 200,
> + MB_REQ_MSG_LOG_VF_ERROR = 200,
> + MB_REQ_MSG_READY_TO_RESET = 201,
This addition should be in patch 3. With that fixed, the series is:
Acked-by: Alex Deucher <alexander.deucher at amd.com>
> };
>
> /* mailbox message send from host to guest */
> @@ -297,17 +299,15 @@ enum amd_sriov_gpu_init_data_version {
> GPU_INIT_DATA_READY_V1 = 1,
> };
>
> -#pragma pack(pop) // Restore previous packing option
> +#pragma pack(pop) // Restore previous packing option
>
> /* checksum function between host and guest */
> -unsigned int amd_sriov_msg_checksum(void *obj,
> - unsigned long obj_size,
> - unsigned int key,
> - unsigned int checksum);
> +unsigned int amd_sriov_msg_checksum(void *obj, unsigned long obj_size, unsigned int key,
> + unsigned int checksum);
>
> /* assertion at compile time */
> #ifdef __linux__
> -#define stringification(s) _stringification(s)
> +#define stringification(s) _stringification(s)
> #define _stringification(s) #s
>
> _Static_assert(
> @@ -318,13 +318,11 @@ _Static_assert(
> sizeof(struct amd_sriov_msg_pf2vf_info) == AMD_SRIOV_MSG_SIZE_KB << 10,
> "amd_sriov_msg_pf2vf_info must be " stringification(AMD_SRIOV_MSG_SIZE_KB) " KB");
>
> -_Static_assert(
> - AMD_SRIOV_MSG_RESERVE_UCODE % 4 == 0,
> - "AMD_SRIOV_MSG_RESERVE_UCODE must be multiple of 4");
> +_Static_assert(AMD_SRIOV_MSG_RESERVE_UCODE % 4 == 0,
> + "AMD_SRIOV_MSG_RESERVE_UCODE must be multiple of 4");
>
> -_Static_assert(
> - AMD_SRIOV_MSG_RESERVE_UCODE > AMD_SRIOV_UCODE_ID__MAX,
> - "AMD_SRIOV_MSG_RESERVE_UCODE must be bigger than AMD_SRIOV_UCODE_ID__MAX");
> +_Static_assert(AMD_SRIOV_MSG_RESERVE_UCODE > AMD_SRIOV_UCODE_ID__MAX,
> + "AMD_SRIOV_MSG_RESERVE_UCODE must be bigger than AMD_SRIOV_UCODE_ID__MAX");
>
> #undef _stringification
> #undef stringification
> --
> 2.25.1
>
More information about the amd-gfx
mailing list