[PATCH 08/13] drm/amd/display: read PSR-SU cap DPCD for specific panel
Tom Chung
chiahsuan.chung at amd.com
Fri Apr 22 16:44:52 UTC 2022
From: David Zhang <dingchen.zhang at amd.com>
[why & how]
For some specific eDP panel, we'd check the PSR-SU cap during boot
by reading the vendor specific DPCD, otherwise it will cause to
false report the eDP panel which supports PSR-SU as an non-PSR-SU
panel.
- add the vendor specific DPCD address in ddc_service_types header
- if specific eDP panel detected, check vendor specific DPCD for
PSR-SU cap
Reviewed-by: Aurabindo Jayamohanan Pillai <Aurabindo.Pillai at amd.com>
Acked-by: Tom Chung <chiahsuan.chung at amd.com>
Signed-off-by: David Zhang <dingchen.zhang at amd.com>
---
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 4 ++++
drivers/gpu/drm/amd/display/include/ddc_service_types.h | 2 ++
2 files changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index c5f5d25035d2..10f990eefe7d 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -5822,6 +5822,10 @@ void detect_edp_sink_caps(struct dc_link *link)
core_link_read_dpcd(link, DP_PSR_SUPPORT,
&link->dpcd_caps.psr_info.psr_version,
sizeof(link->dpcd_caps.psr_info.psr_version));
+ if (link->dpcd_caps.sink_dev_id == DP_BRANCH_DEVICE_ID_001CF8)
+ core_link_read_dpcd(link, DP_FORCE_PSRSU_CAPABILITY,
+ &link->dpcd_caps.psr_info.force_psrsu_cap,
+ sizeof(link->dpcd_caps.psr_info.force_psrsu_cap));
core_link_read_dpcd(link, DP_PSR_CAPS,
&link->dpcd_caps.psr_info.psr_dpcd_caps.raw,
sizeof(link->dpcd_caps.psr_info.psr_dpcd_caps.raw));
diff --git a/drivers/gpu/drm/amd/display/include/ddc_service_types.h b/drivers/gpu/drm/amd/display/include/ddc_service_types.h
index f883d87791fe..73b9e0a87e54 100644
--- a/drivers/gpu/drm/amd/display/include/ddc_service_types.h
+++ b/drivers/gpu/drm/amd/display/include/ddc_service_types.h
@@ -39,6 +39,8 @@
#define DP_BRANCH_HW_REV_20 0x20
#define DP_DEVICE_ID_38EC11 0x38EC11
+#define DP_FORCE_PSRSU_CAPABILITY 0x40F
+
enum ddc_result {
DDC_RESULT_UNKNOWN = 0,
DDC_RESULT_SUCESSFULL,
--
2.25.1
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