[PATCH] drm/amdgpu: use sjt mec fw on aldebaran for sriov

[Liu, Shaoyun]

[AMD Official Use Only - General]

Thanks for the review and yes in the  host driver side , the  PF already load the sjt MEC fw ,  the  psp policy requires the  MEC version loaded in guest side should not be lower  than the version  already  loaded in host side . So this will guarantee only  the VF with sjt version can be initialized and enabled .

Regards
Shaoyun.liu

-----Original Message-----
From: Alex Deucher <alexdeucher at gmail.com>
Sent: Wednesday, August 10, 2022 12:35 PM
To: Liu, Shaoyun <Shaoyun.Liu at amd.com>
Cc: amd-gfx at lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu: use sjt mec fw on aldebaran for sriov

On Fri, Aug 5, 2022 at 12:11 PM shaoyunl <shaoyun.liu at amd.com> wrote:
>
> The second jump table is required on live migration or mulitple VF
> configuration on Aldebaran. With this implemented, the first level
> jump table(hw used) will be same, mec fw internal will use the second
> level jump table jump to the real functionality implementation.
> so the different VF can load different version of MEC as long as they
> support sjt

You might want some sort of mechanism to determine if the sjt firmware was loaded so you know whether live migration is possible, although I guess it's probably only used in controlled environments so it would be a known prerequisite.

Acked-by: Alex Deucher <alexander.deucher at amd.com>

Alex

>
> Signed-off-by: shaoyunl <shaoyun.liu at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 14 ++++++++++++--
>  1 file changed, 12 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index c6e0f9313a7f..7f187558220e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -126,6 +126,8 @@ MODULE_FIRMWARE("amdgpu/green_sardine_rlc.bin");
>  MODULE_FIRMWARE("amdgpu/aldebaran_mec.bin");
>  MODULE_FIRMWARE("amdgpu/aldebaran_mec2.bin");
>  MODULE_FIRMWARE("amdgpu/aldebaran_rlc.bin");
> +MODULE_FIRMWARE("amdgpu/aldebaran_sjt_mec.bin");
> +MODULE_FIRMWARE("amdgpu/aldebaran_sjt_mec2.bin");
>
>  #define mmTCP_CHAN_STEER_0_ARCT                                                                0x0b03
>  #define mmTCP_CHAN_STEER_0_ARCT_BASE_IDX                                                       0
> @@ -1496,7 +1498,11 @@ static int gfx_v9_0_init_cp_compute_microcode(struct amdgpu_device *adev,
>         const struct common_firmware_header *header = NULL;
>         const struct gfx_firmware_header_v1_0 *cp_hdr;
>
> -       snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec.bin", chip_name);
> +       if (amdgpu_sriov_vf(adev) && (adev->asic_type == CHIP_ALDEBARAN))
> +               snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_sjt_mec.bin", chip_name);
> +       else
> +               snprintf(fw_name, sizeof(fw_name),
> + "amdgpu/%s_mec.bin", chip_name);
> +
>         err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev);
>         if (err)
>                 goto out;
> @@ -1509,7 +1515,11 @@ static int
> gfx_v9_0_init_cp_compute_microcode(struct amdgpu_device *adev,
>
>
>         if (gfx_v9_0_load_mec2_fw_bin_support(adev)) {
> -               snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec2.bin", chip_name);
> +               if (amdgpu_sriov_vf(adev) && (adev->asic_type == CHIP_ALDEBARAN))
> +                       snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_sjt_mec2.bin", chip_name);
> +               else
> +                       snprintf(fw_name, sizeof(fw_name),
> + "amdgpu/%s_mec2.bin", chip_name);
> +
>                 err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev);
>                 if (!err) {
>                         err =
> amdgpu_ucode_validate(adev->gfx.mec2_fw);
> --
> 2.17.1
>