[PATCH] drm/amdgpu/mes: zero the sdma_hqd_mask of 2nd SDMA engine for SDMA 6.0.1
Yifan Zhang
yifan1.zhang at amd.com
Tue Aug 30 15:23:35 UTC 2022
there is only one SDMA engine in SDMA 6.0.1, the sdma_hqd_mask has to be
zeroed for the 2nd engine, otherwise MES scheduler will consider 2nd
engine exists and map/unmap SDMA queues to the non-existent engine.
Signed-off-by: Yifan Zhang <yifan1.zhang at amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
index fe82b8b19a4e..f876fd62ab81 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
@@ -185,6 +185,14 @@ int amdgpu_mes_init(struct amdgpu_device *adev)
adev->mes.sdma_hqd_mask[i] = 0xfc;
}
+ /* there is only one SDMA engine in SDMA 6.0.1, the sdma_hqd_mask
+ * has to be zeroed for the 2nd engine, otherwise MES scheduler will
+ * consider 2nd engine exists and map/unmap SDMA queues to the non-existent
+ * engine.
+ */
+ if (adev->ip_versions[SDMA0_HWIP][0] == IP_VERSION(6, 0, 1))
+ adev->mes.sdma_hqd_mask[AMDGPU_MES_MAX_SDMA_PIPES - 1] = 0;
+
r = amdgpu_device_wb_get(adev, &adev->mes.sch_ctx_offs);
if (r) {
dev_err(adev->dev,
--
2.37.1
More information about the amd-gfx
mailing list