[PATCH] drm/amdgpu/mes: zero the sdma_hqd_mask of 2nd SDMA engine for SDMA 6.0.1

[Zhang, Yifan]

[Public]

OK, that's a better solution. 

Best Regards,
Yifan

-----Original Message-----
From: Alex Deucher <alexdeucher at gmail.com> 
Sent: Tuesday, August 30, 2022 11:31 PM
To: Zhang, Yifan <Yifan1.Zhang at amd.com>
Cc: amd-gfx at lists.freedesktop.org; Deucher, Alexander <Alexander.Deucher at amd.com>; Huang, Tim <Tim.Huang at amd.com>; Xiao, Jack <Jack.Xiao at amd.com>; Du, Xiaojian <Xiaojian.Du at amd.com>
Subject: Re: [PATCH] drm/amdgpu/mes: zero the sdma_hqd_mask of 2nd SDMA engine for SDMA 6.0.1

On Tue, Aug 30, 2022 at 11:24 AM Yifan Zhang <yifan1.zhang at amd.com> wrote:
>
> there is only one SDMA engine in SDMA 6.0.1, the sdma_hqd_mask has to 
> be zeroed for the 2nd engine, otherwise MES scheduler will consider 
> 2nd engine exists and map/unmap SDMA queues to the non-existent engine.
>
> Signed-off-by: Yifan Zhang <yifan1.zhang at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> index fe82b8b19a4e..f876fd62ab81 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> @@ -185,6 +185,14 @@ int amdgpu_mes_init(struct amdgpu_device *adev)
>                         adev->mes.sdma_hqd_mask[i] = 0xfc;
>         }
>
> +       /* there is only one SDMA engine in SDMA 6.0.1, the sdma_hqd_mask
> +        * has to be zeroed for the 2nd engine, otherwise MES scheduler will
> +        * consider 2nd engine exists and map/unmap SDMA queues to the non-existent
> +        * engine.
> +        */
> +       if (adev->ip_versions[SDMA0_HWIP][0] == IP_VERSION(6, 0, 1))

How about checking for the number of instances rather than a specific IP version?
E.g.,
if (adev->sdma.num_instances == 1)

This makes things more future proof for newer SDMA 6.x IPs.

Alex

> +               adev->mes.sdma_hqd_mask[AMDGPU_MES_MAX_SDMA_PIPES - 1] 
> + = 0;
> +
>         r = amdgpu_device_wb_get(adev, &adev->mes.sch_ctx_offs);
>         if (r) {
>                 dev_err(adev->dev,
> --
> 2.37.1
>