[PATCH 1/2] drm/amdgpu: add GART, GPUVM, and GTT to glossary

[Bhardwaj, Rajneesh]

Both patches are:

Reviewed-by: Rajneesh Bhardwaj <rajneesh.bhardwaj at amd.com>

On 12/1/2022 4:41 PM, Alex Deucher wrote:
> Add definitions to clarify GPU virtual memory.
>
> v2: clarify the terms a bit more
>
> Reviewed-by: Luben Tuikov <luben.tuikov at amd.com>
> Suggested-by: Peter Maucher <bellosilicio at gmail.com>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
>   Documentation/gpu/amdgpu/amdgpu-glossary.rst | 23 ++++++++++++++++++++
>   1 file changed, 23 insertions(+)
>
> diff --git a/Documentation/gpu/amdgpu/amdgpu-glossary.rst b/Documentation/gpu/amdgpu/amdgpu-glossary.rst
> index 326896e9800d..00a47ebb0b0f 100644
> --- a/Documentation/gpu/amdgpu/amdgpu-glossary.rst
> +++ b/Documentation/gpu/amdgpu/amdgpu-glossary.rst
> @@ -30,12 +30,35 @@ we have a dedicated glossary for Display Core at
>       EOP
>         End Of Pipe/Pipeline
>   
> +    GART
> +      Graphics Address Remapping Table.  This is the name we use for the GPUVM
> +      page table used by the GPU kernel driver.  It remaps system resources
> +      (memory or MMIO space) into the GPU's address space so the GPU can access
> +      them.  The name GART harkens back to the days of AGP when the platform
> +      provided an MMU that the GPU could use to get a contiguous view of
> +      scattered pages for DMA.  The MMU has since moved on to the GPU, but the
> +      name stuck.
> +
>       GC
>         Graphics and Compute
>   
>       GMC
>         Graphic Memory Controller
>   
> +    GPUVM
> +      GPU Virtual Memory.  This is the GPU's MMU.  The GPU supports multiple
> +      virtual address spaces that can be in flight at any given time.  These
> +      allow the GPU to remap VRAM and system resources into GPU virtual address
> +      spaces for use by the GPU kernel driver and applications using the GPU.
> +      These provide memory protection for different applications using the GPU.
> +
> +    GTT
> +      Graphics Translation Tables.  This is a memory pool managed through TTM
> +      which provides access to system resources (memory or MMIO space) for
> +      use by the GPU. These addresses can be mapped into the "GART" GPUVM page
> +      table for use by the kernel driver or into per process GPUVM page tables
> +      for application usage.
> +
>       IH
>         Interrupt Handler
>