[PATCH] drm/amdgpu: handle polaris10/11 overlap asics (v2)
Luben Tuikov
luben.tuikov at amd.com
Wed Dec 7 17:48:42 UTC 2022
Acked-by: Luben Tuikov <luben.tuikov at amd.com>
Regards,
Luben
On 2022-12-07 12:06, Alex Deucher wrote:
> Some special polaris 10 chips overlap with the polaris11
> DID range. Handle this properly in the driver.
>
> v2: use local flags for other function calls.
>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 13 +++++++++++--
> 1 file changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index 7383272c6a3a..b4f2d61ea0d5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -2039,6 +2039,15 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
> "See modparam exp_hw_support\n");
> return -ENODEV;
> }
> + /* differentiate between P10 and P11 asics with the same DID */
> + if (pdev->device == 0x67FF &&
> + (pdev->revision == 0xE3 ||
> + pdev->revision == 0xE7 ||
> + pdev->revision == 0xF3 ||
> + pdev->revision == 0xF7)) {
> + flags &= ~AMD_ASIC_MASK;
> + flags |= CHIP_POLARIS10;
> + }
>
> /* Due to hardware bugs, S/G Display on raven requires a 1:1 IOMMU mapping,
> * however, SME requires an indirect IOMMU mapping because the encryption
> @@ -2108,12 +2117,12 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
>
> pci_set_drvdata(pdev, ddev);
>
> - ret = amdgpu_driver_load_kms(adev, ent->driver_data);
> + ret = amdgpu_driver_load_kms(adev, flags);
> if (ret)
> goto err_pci;
>
> retry_init:
> - ret = drm_dev_register(ddev, ent->driver_data);
> + ret = drm_dev_register(ddev, flags);
> if (ret == -EAGAIN && ++retry <= 3) {
> DRM_INFO("retry init %d\n", retry);
> /* Don't request EX mode too frequently which is attacking */
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