[PATCH 11/23] drm/amd/display: Check for PSR in no memory request case

Alex Deucher alexdeucher at gmail.com
Fri Dec 9 21:37:43 UTC 2022


On Fri, Dec 9, 2022 at 11:38 AM jdhillon <jdhillon at amd.com> wrote:
>
> From: Samson Tam <Samson.Tam at amd.com>
>
> [Why]
> When we have a PSR display, we will not be requesting data from memory anymore.
> So we report back true for no memory request case.
>
> [How]
> Check for PSR by checking PSR version in link settings
>
> Reviewed-by: Alvin Lee <Alvin.Lee2 at amd.com>
> Acked-by: Jasdeep Dhillon <jdhillon at amd.com>
> Signed-off-by: Samson Tam <Samson.Tam at amd.com>
> ---
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c  | 9 +--------
>  drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c | 3 ++-
>  2 files changed, 3 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index dc23801de071..6a6e4c844316 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -8359,10 +8359,7 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)
>                         new_crtc_state = drm_atomic_get_new_crtc_state(state, &acrtc->base);
>                         old_crtc_state = drm_atomic_get_old_crtc_state(state, &acrtc->base);
>                 }
> -<<<<<<< HEAD
> -=======
> -
> ->>>>>>> 667f52144b9a (drm/amd/display: phase3 mst hdcp for multiple displays)
> +

Please squash these in with the patch that added them.

>                 if (old_crtc_state)
>                         pr_debug("old crtc en: %x a: %x m: %x a-chg: %x c-chg: %x\n",
>                         old_crtc_state->enable,
> @@ -8425,10 +8422,6 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)
>                                 DRM_MODE_CONTENT_PROTECTION_DESIRED)
>                                 enable_encryption = true;
>
> -<<<<<<< HEAD
> -
> -=======
> ->>>>>>> 667f52144b9a (drm/amd/display: phase3 mst hdcp for multiple displays)

same here.

Alex

>                         if (aconnector->dc_link && aconnector->dc_sink &&
>                                 aconnector->dc_link->type == dc_connection_mst_branch) {
>                                 struct hdcp_workqueue *hdcp_work = adev->dm.hdcp_workqueue;
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
> index b8767be1e4c5..2f0ebe1f6c45 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
> @@ -188,7 +188,8 @@ static bool dcn32_check_no_memory_request_for_cab(struct dc *dc)
>
>      /* First, check no-memory-request case */
>         for (i = 0; i < dc->current_state->stream_count; i++) {
> -               if (dc->current_state->stream_status[i].plane_count)
> +               if ((dc->current_state->stream_status[i].plane_count) &&
> +                       (dc->current_state->streams[i]->link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED))
>                         /* Fail eligibility on a visible stream */
>                         break;
>         }
> --
> 2.34.1
>


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