[5/7] drm/amdgpu: for S0ix, skip SMDA 5.x+ suspend/resume
Alex Deucher
alexdeucher at gmail.com
Fri Dec 16 16:51:31 UTC 2022
On Fri, Dec 16, 2022 at 9:35 AM Limonciello, Mario
<mario.limonciello at amd.com> wrote:
>
> +Tim
>
> On 12/15/2022 16:10, Alex Deucher wrote:
> > SDMA 5.x is part of the GFX block so it's controlled via
> > GFXOFF. Skip suspend as it should be handled the same
> > as GFX.
> >
> > v2: drop SDMA 4.x. That requires special handling.
> >
> > Acked-by: Rajneesh Bhardwaj <rajneesh.bhardwaj at amd.com>
> > Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> > ---
> > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > index a99b327d5f09..5c0719c03c37 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > @@ -3028,6 +3028,12 @@ static int amdgpu_device_ip_suspend_phase2(struct amdgpu_device *adev)
> > adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GFX))
> > continue;
> >
> > + /* SDMA 5.x+ is part of GFX power domain so it's covered by GFXOFF */
> > + if (adev->in_s0ix &&
> > + (adev->ip_versions[SDMA0_HWIP][0] >= IP_VERSION(5, 0, 0)) &&
> > + (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_SDMA))
> > + continue;
> > +
>
> I think we want to also skip MES here too, right? That might be a
> follow up patch though.
Sent as a follow up.
Alex
>
> > /* XXX handle errors */
> > r = adev->ip_blocks[i].version->funcs->suspend(adev);
> > /* XXX handle errors */
>
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