drm/amdgpu: skip MES for S0ix as well since it's part of GFX

[Limonciello, Mario]

On 12/16/2022 10:44, Alex Deucher wrote:
> It's also part of gfxoff.
> 
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>

Reviewed-by: Mario Limonciello <mario.limonciello at amd.com>

Even without the other series this alone has been shown
to improve things for the affected ASIC, so it should
probably go to stable.

Cc: stable at vger.kernel.org # 6.0, 6.1

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 5 +++--
>   1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 582a80a9850e..e4609b8d574c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -3018,14 +3018,15 @@ static int amdgpu_device_ip_suspend_phase2(struct amdgpu_device *adev)
>   			continue;
>   		}
>   
> -		/* skip suspend of gfx and psp for S0ix
> +		/* skip suspend of gfx/mes and psp for S0ix
>   		 * gfx is in gfxoff state, so on resume it will exit gfxoff just
>   		 * like at runtime. PSP is also part of the always on hardware
>   		 * so no need to suspend it.
>   		 */
>   		if (adev->in_s0ix &&
>   		    (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_PSP ||
> -		     adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GFX))
> +		     adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GFX ||
> +		     adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_MES))
>   			continue;
>   
>   		/* SDMA 5.x+ is part of GFX power domain so it's covered by GFXOFF */