[PATCH 1/2] drm/amdgpu: add utcl2_harvest to gc 10.3.1

Huang Rui ray.huang at amd.com
Mon Feb 7 06:34:38 UTC 2022


On Mon, Feb 07, 2022 at 10:41:54AM +0800, Liu, Aaron wrote:
> Confirmed with hardware team, there is harvesting for gc 10.3.1.
> 
> Signed-off-by: Aaron Liu <aaron.liu at amd.com>

Reviewed-by: Huang Rui <ray.huang at amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c
> index b4eddf6e98a6..ff738e9725ee 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_1.c
> @@ -543,7 +543,9 @@ static void gfxhub_v2_1_utcl2_harvest(struct amdgpu_device *adev)
>  		adev->gfx.config.max_sh_per_se *
>  		adev->gfx.config.max_shader_engines);
>  
> -	if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 3, 3)) {
> +	switch (adev->ip_versions[GC_HWIP][0]) {
> +	case IP_VERSION(10, 3, 1):
> +	case IP_VERSION(10, 3, 3):
>  		/* Get SA disabled bitmap from eFuse setting */
>  		efuse_setting = RREG32_SOC15(GC, 0, mmCC_GC_SA_UNIT_DISABLE);
>  		efuse_setting &= CC_GC_SA_UNIT_DISABLE__SA_DISABLE_MASK;
> @@ -566,6 +568,9 @@ static void gfxhub_v2_1_utcl2_harvest(struct amdgpu_device *adev)
>  		disabled_sa = tmp;
>  
>  		WREG32_SOC15(GC, 0, mmGCUTCL2_HARVEST_BYPASS_GROUPS_YELLOW_CARP, disabled_sa);
> +		break;
> +	default:
> +		break;
>  	}
>  }
>  
> -- 
> 2.25.1
> 


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