[PATCH 1/2] drm/amdgpu: add debugfs for reset registers list

Sharma, Shashank shashank.sharma at amd.com
Tue Feb 8 14:18:07 UTC 2022



On 2/8/2022 2:39 PM, Somalapuram, Amaranath wrote:
> 
> 
> On 2/8/2022 4:43 PM, Sharma, Shashank wrote:
>> I thought we spoke and agreed about:
>> - Not doing dynamic memory allocation during a reset call,
> as there is a redesign debugfs call will happen during the application 
> initialization and not during reset.
>> - Not doing string operations, but just dumping register values by index.
> I think your referring to the second patch which happens during reset 
> and no string operation in second patch.

Pls see my comment in the end.

>> NACK !
>>
>> - Shashank
>>
>> Amar,
>> Apart from the long comment,there are a few more bugs in the patch, 
>> which I have mentioned here inline. Please check them out.
>>
>> - Shashank
>>
>> On 2/8/2022 9:18 AM, Christian König wrote:
>>> Am 08.02.22 um 09:16 schrieb Somalapuram Amaranath:
>>>> List of register to be populated for dump collection during the GPU 
>>>> reset.
>>>>
>>>> Signed-off-by: Somalapuram Amaranath <Amaranath.Somalapuram at amd.com>
>>>> ---
>>>>   drivers/gpu/drm/amd/amdgpu/amdgpu.h         |  3 ++
>>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 60 
>>>> +++++++++++++++++++++
>>>>   2 files changed, 63 insertions(+)
>>>>
>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
>>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>>> index b85b67a88a3d..78fa46f959c5 100644
>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
>>>> @@ -1097,6 +1097,9 @@ struct amdgpu_device {
>>>>       struct amdgpu_reset_control     *reset_cntl;
>>>>       uint32_t ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE];
>>>> +
>>>> +    /* reset dump register */
>>>> +    long            reset_dump_reg_list[128];
>>>
>>> I don't have time for a full review, but using long here certainly 
>>> makes no sense.
>>>
>>> long is either 32bit or 64bit depending on the CPU architecture.
>>>
>>> Regards,
>>> Christian.
>>>
> will change uint32_t.
>>>>   };
>>>>   static inline struct amdgpu_device *drm_to_adev(struct drm_device 
>>>> *ddev)
>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c 
>>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>>>> index 164d6a9e9fbb..dad268e8a81a 100644
>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
>>>> @@ -1609,6 +1609,64 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL,
>>>>   DEFINE_DEBUGFS_ATTRIBUTE(fops_sclk_set, NULL,
>>>>               amdgpu_debugfs_sclk_set, "%llu\n");
>>>> +static ssize_t amdgpu_reset_dump_register_list_read(struct file *f,
>>>> +                char __user *buf, size_t size, loff_t *pos)
>>>> +{
>>>> +    struct amdgpu_device *adev = (struct amdgpu_device 
>>>> *)file_inode(f)->i_private;
>>>> +    char *reg_offset;
>>>> +    int i, r, len;
>>>> +
>>>> +    reg_offset = kmalloc(2048, GFP_KERNEL);

We also want to understand how does the value 2048 came into picture, 
probably a macro which calculates the size preprocessing time will work 
better.

#define #define N_REGS_DUMP_GPU_RESET 10
#define BUFFER_SZ(N_REGS_DUMP_GPU_RESET * (sizeof uint64_t) + 1)

This first macro can be used later for the loop count for registers as well.

>>>> +    memset(reg_offset,  0, 2048);
>>>> +    for (i = 0; adev->reset_dump_reg_list[i] != 0; i++)
>>
>> This loop termination condition is incorrect, why are we running the 
>> loop until adev->reset_dump_reg_list[i] != 0 ?
>>
>> What if I have 10 registers to dump, but my 4th register value is 0 ? 
>> It will break the loop at 4 and we will not get all values.
>>
> agreed, i try to avoid one more variable in adev

Not by the cost of logic of course :).

Now you can run this loop here.

for (i = 0; i < N_REGS...; i++) {
	register_value_copy_here;
}

>>>> +        sprintf(reg_offset + strlen(reg_offset), "0x%lx ", 
>>>> adev->reset_dump_reg_list[i]);
>>>> +

>>>> +    sprintf(reg_offset + strlen(reg_offset), "\n");
>>>> +    len = strlen(reg_offset);
>>>> +
>>>> +    if (*pos >=  len)
>>>> +        return 0;
>>>> +
>>>> +    r = copy_to_user(buf, reg_offset, len);
>>>> +    *pos += len - r;
>>>> +    kfree(reg_offset);
>>
>> Also, why are we doing a dynamic memory allocation for reg_offest ? We 
>> can simply use adev->reset_dump_reg_list[i] isnt't it ?
>>
>> simply
>> for (i=0; i<num_of_regs;i++) {
>>     copy_to_user(buf, adev->reg_list[i], sizeof(uint64_t));
>> }
>>
>> Or without even a loop, simply:
>> copy_to_user(buf, &adev->reg_list, num_regs * sizeof(uint64_t));
>>
>> - Shashank
> 
> it will not be in user readable format for debugfs, (if non readable is 
> acceptable I will change this)
> 

We are just adding 0x in front of the reg value, so honestly I don't see 
a huge improvement in the user readability, but if you still want to do 
the dynamic allocation of memory, add the register offset or name as 
well, I mean then it should read like:

0x1234 = 0xABCD
0x1238 = 0xFFFF

- Shashank

>> +
>>>>
>>>> +    return len - r;
>>>> +}
>>>> +
>>>> +static ssize_t amdgpu_reset_dump_register_list_write(struct file 
>>>> *f, const char __user *buf,
>>>> +        size_t size, loff_t *pos)
>>>> +{
>>>> +    struct amdgpu_device *adev = (struct amdgpu_device 
>>>> *)file_inode(f)->i_private;
>>>> +    char *reg_offset, *reg;
>>>> +    int ret, i = 0;
>>>> +
>>>> +    reg_offset = kmalloc(size, GFP_KERNEL);
>>>> +    memset(reg_offset,  0, size);
>>>> +    ret = copy_from_user(reg_offset, buf, size);
>>>> +
>>
>> We are not allowing user to write into the list, so this whole 
>> function can just be a NOOP.
>>
>> - Shashank
> User only update the list of reg offsets on init, there is no predefined 
> reg offset from kernel code.
>>
>>>> +    if (ret)
>>>> +        return -EFAULT;
>>>> +
>>>> +    while ((reg = strsep(&reg_offset, " ")) != NULL) {
>>>> +        ret  = kstrtol(reg, 16, &adev->reset_dump_reg_list[i]);
>>>> +        if (ret)
>>>> +            return -EINVAL;
>>>> +        i++;
>>>> +    }
>>>> +
>>>> +    kfree(reg_offset);
>>>> +
>>>> +    return size;
>>>> +}
>>>> +
>>>> +static const struct file_operations amdgpu_reset_dump_register_list 
>>>> = {
>>>> +    .owner = THIS_MODULE,
>>>> +    .read = amdgpu_reset_dump_register_list_read,
>>>> +    .write = amdgpu_reset_dump_register_list_write,
>>>> +    .llseek = default_llseek
>>>> +};
>>>> +
>>>>   int amdgpu_debugfs_init(struct amdgpu_device *adev)
>>>>   {
>>>>       struct dentry *root = adev_to_drm(adev)->primary->debugfs_root;
>>>> @@ -1672,6 +1730,8 @@ int amdgpu_debugfs_init(struct amdgpu_device 
>>>> *adev)
>>>>                   &amdgpu_debugfs_test_ib_fops);
>>>>       debugfs_create_file("amdgpu_vm_info", 0444, root, adev,
>>>>                   &amdgpu_debugfs_vm_info_fops);
>>>> +    debugfs_create_file("amdgpu_reset_dump_register_list", 0644, 
>>>> root, adev,
>>>> +                &amdgpu_reset_dump_register_list);
>>>>       adev->debugfs_vbios_blob.data = adev->bios;
>>>>       adev->debugfs_vbios_blob.size = adev->bios_size;
>>>


More information about the amd-gfx mailing list