[PATCH 1/2] drm/amd/pm: update message definition for smu 13.0.5
Yifan Zhang
yifan1.zhang at amd.com
Thu Feb 24 11:30:18 UTC 2022
this patch updates message definition for smu 13.0.5
Signed-off-by: Yifan Zhang <yifan1.zhang at amd.com>
---
.../inc/pmfw_if/smu13_driver_if_v13_0_5.h | 1 -
.../pm/swsmu/inc/pmfw_if/smu_v13_0_5_ppsmc.h | 56 +++++++++----------
.../drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c | 4 +-
3 files changed, 29 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_5.h b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_5.h
index aa971412b434..f3a22642c88b 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_5.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_5.h
@@ -103,7 +103,6 @@ typedef struct {
uint16_t ThrottlerStatus;
uint16_t CurrentSocketPower; //[mW]
- uint16_t spare1;
} SmuMetrics_t;
//Freq in MHz
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_5_ppsmc.h b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_5_ppsmc.h
index c6238c74923a..fb483bd9e147 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_5_ppsmc.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_5_ppsmc.h
@@ -32,34 +32,34 @@
#define PPSMC_Result_CmdRejectedBusy 0xFC
-// Message Definitions:
-#define PPSMC_MSG_TestMessage 1
-#define PPSMC_MSG_GetSmuVersion 2
-#define PPSMC_MSG_EnableGfxOff 3 ///< Enable GFXOFF
-#define PPSMC_MSG_DisableGfxOff 4 ///< Disable GFXOFF
-#define PPSMC_MSG_PowerDownVcn 5 ///< Power down VCN
-#define PPSMC_MSG_PowerUpVcn 6 ///< Power up VCN; VCN is power gated by default
-#define PPSMC_MSG_SetHardMinVcn 7 ///< For wireless display
-#define PPSMC_MSG_SetSoftMinGfxclk 8 ///< Set SoftMin for GFXCLK, argument is frequency in MHz
-#define PPSMC_MSG_Spare0 9 ///< Spare
-#define PPSMC_MSG_GfxDeviceDriverReset 10 ///< Request GFX mode 2 reset
-#define PPSMC_MSG_SetDriverDramAddrHigh 11 ///< Set high 32 bits of DRAM address for Driver table transfer
-#define PPSMC_MSG_SetDriverDramAddrLow 12 ///< Set low 32 bits of DRAM address for Driver table transfer
-#define PPSMC_MSG_TransferTableSmu2Dram 13 ///< Transfer driver interface table from PMFW SRAM to DRAM
-#define PPSMC_MSG_TransferTableDram2Smu 14 ///< Transfer driver interface table from DRAM to PMFW SRAM
-#define PPSMC_MSG_GetGfxclkFrequency 15 ///< Get GFX clock frequency
-#define PPSMC_MSG_GetEnabledSmuFeatures 16 ///< Get enabled features in PMFW
-#define PPSMC_MSG_SetSoftMaxVcn 17 ///< Set soft max for VCN clocks (VCLK and DCLK)
-#define PPSMC_MSG_PowerDownJpeg 18 ///< Power down Jpeg
-#define PPSMC_MSG_PowerUpJpeg 19 ///< Power up Jpeg; VCN is power gated by default
-#define PPSMC_MSG_SetSoftMaxGfxClk 20
-#define PPSMC_MSG_SetHardMinGfxClk 21 ///< Set hard min for GFX CLK
-#define PPSMC_MSG_AllowGfxOff 22 ///< Inform PMFW of allowing GFXOFF entry
-#define PPSMC_MSG_DisallowGfxOff 23 ///< Inform PMFW of disallowing GFXOFF entry
-#define PPSMC_MSG_SetSoftMinVcn 24 ///< Set soft min for VCN clocks (VCLK and DCLK)
-#define PPSMC_MSG_GetDriverIfVersion 25 ///< Get PMFW_DRIVER_IF version
-#define PPSMC_MSG_PrepareMp1ForUnload 26 ///< Prepare PMFW for GFX driver unload
-#define PPSMC_Message_Count 27
+#define PPSMC_MSG_TestMessage 0x01 ///< To check if PMFW is alive and responding. Requirement specified by PMFW team
+#define PPSMC_MSG_GetSmuVersion 0x02 ///< Get PMFW version
+#define PPSMC_MSG_SPARE0 0x03 ///< SPARE
+#define PPSMC_MSG_SPARE1 0x04 ///< SPARE
+#define PPSMC_MSG_PowerDownVcn 0x05 ///< Power down VCN
+#define PPSMC_MSG_PowerUpVcn 0x06 ///< Power up VCN; VCN is power gated by default
+#define PPSMC_MSG_SetHardMinVcn 0x07 ///< For wireless display
+#define PPSMC_MSG_SetSoftMinGfxclk 0x08 ///< Set SoftMin for GFXCLK, argument is frequency in MHz
+#define PPSMC_MSG_SPARE2 0x09 ///< SPARE
+#define PPSMC_MSG_GfxDeviceDriverReset 0x0A ///< Request GFX mode 2 reset
+#define PPSMC_MSG_SetDriverDramAddrHigh 0x0B ///< Set high 32 bits of DRAM address for Driver table transfer
+#define PPSMC_MSG_SetDriverDramAddrLow 0x0C ///< Set low 32 bits of DRAM address for Driver table transfer
+#define PPSMC_MSG_TransferTableSmu2Dram 0x0D ///< Transfer driver interface table from PMFW SRAM to DRAM
+#define PPSMC_MSG_TransferTableDram2Smu 0x0E ///< Transfer driver interface table from DRAM to PMFW SRAM
+#define PPSMC_MSG_GetGfxclkFrequency 0x0F ///< Get GFX clock frequency
+#define PPSMC_MSG_GetEnabledSmuFeatures 0x10 ///< Get enabled features in PMFW
+#define PPSMC_MSG_SetSoftMaxVcn 0x11 ///< Set soft max for VCN clocks (VCLK and DCLK)
+#define PPSMC_MSG_PowerDownJpeg 0x12 ///< Power down Jpeg
+#define PPSMC_MSG_PowerUpJpeg 0x13 ///< Power up Jpeg; VCN is power gated by default
+#define PPSMC_MSG_SetSoftMaxGfxClk 0x14 ///< Set soft min for GFX CLK
+#define PPSMC_MSG_SetHardMinGfxClk 0x15 ///< Set hard min for GFX CLK
+#define PPSMC_MSG_AllowGfxOff 0x16 ///< Inform PMFW of allowing GFXOFF entry
+#define PPSMC_MSG_DisallowGfxOff 0x17 ///< Inform PMFW of disallowing GFXOFF entry
+#define PPSMC_MSG_SetSoftMinVcn 0x18 ///< Set soft min for VCN clocks (VCLK and DCLK)
+#define PPSMC_MSG_GetDriverIfVersion 0x19 ///< Get PMFW_DRIVER_IF version
+#define PPSMC_MSG_PrepareMp1ForUnload 0x1A ///< Prepare PMFW for GFX driver unload
+#define PPSMC_MSG_GetThermalControllerLimit 0x1B ///< Provide thermal limit
+#define PPSMC_Message_Count 0x1C ///< Total number of PPSMC messages
/** @enum Mode_Reset_e
* Mode reset type, argument for PPSMC_MSG_GfxDeviceDriverReset
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c
index 8ee5bcb60370..0bc15ff822a5 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c
@@ -57,13 +57,11 @@
static struct cmn2asic_msg_mapping smu_v13_0_5_message_map[SMU_MSG_MAX_COUNT] = {
MSG_MAP(TestMessage, PPSMC_MSG_TestMessage, 1),
MSG_MAP(GetSmuVersion, PPSMC_MSG_GetSmuVersion, 1),
- MSG_MAP(EnableGfxOff, PPSMC_MSG_EnableGfxOff, 1),
- MSG_MAP(DisableGfxOff, PPSMC_MSG_DisableGfxOff, 1),
MSG_MAP(PowerDownVcn, PPSMC_MSG_PowerDownVcn, 1),
MSG_MAP(PowerUpVcn, PPSMC_MSG_PowerUpVcn, 1),
MSG_MAP(SetHardMinVcn, PPSMC_MSG_SetHardMinVcn, 1),
MSG_MAP(SetSoftMinGfxclk, PPSMC_MSG_SetSoftMinGfxclk, 1),
- MSG_MAP(Spare0, PPSMC_MSG_Spare0, 1),
+ MSG_MAP(Spare0, PPSMC_MSG_SPARE0, 1),
MSG_MAP(GfxDeviceDriverReset, PPSMC_MSG_GfxDeviceDriverReset, 1),
MSG_MAP(SetDriverDramAddrHigh, PPSMC_MSG_SetDriverDramAddrHigh, 1),
MSG_MAP(SetDriverDramAddrLow, PPSMC_MSG_SetDriverDramAddrLow, 1),
--
2.25.1
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