[PATCH] drm/amdgpu: Use correct VIEWPORT_DIMENSION for DCN2

Christian König christian.koenig at amd.com
Thu Jan 6 09:17:07 UTC 2022


Am 05.01.22 um 21:39 schrieb Harry Wentland:
> For some reason this file isn't using the appropriate register
> headers for DCN headers, which means that on DCN2 we're getting
> the VIEWPORT_DIMENSION offset wrong.
>
> This means that we're not correctly carving out the framebuffer
> memory correctly for a framebuffer allocated by EFI and
> therefore see corruption when loading amdgpu before the display
> driver takes over control of the framebuffer scanout.
>
> Fix this by checking the DCE_HWIP and picking the correct offset
> accordingly.
>
> Long-term we should expose this info from DC as GMC shouldn't
> need to know about DCN registers.
>
> Signed-off-by: Harry Wentland <harry.wentland at amd.com>

Please add a TODO comment that in the long run that code should be moved 
into DC.

With that done the patch is Acked-by: Christian König 
<christian.koenig at amd.com>.

Thanks,
Christian.

> ---
>   drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 12 +++++++++++-
>   1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 57f2729a7bd0..8367ecf61af1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -72,6 +72,9 @@
>   #define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0                                                                  0x049d
>   #define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0_BASE_IDX                                                         2
>   
> +#define DCN2_mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION                                                          0x05ea
> +#define DCN2_mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION_BASE_IDX                                                 2
> +
>   
>   static const char *gfxhub_client_ids[] = {
>   	"CB",
> @@ -1142,7 +1145,6 @@ static unsigned gmc_v9_0_get_vbios_fb_size(struct amdgpu_device *adev)
>   		switch (adev->ip_versions[DCE_HWIP][0]) {
>   		case IP_VERSION(1, 0, 0):
>   		case IP_VERSION(1, 0, 1):
> -		case IP_VERSION(2, 1, 0):
>   			viewport = RREG32_SOC15(DCE, 0, mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION);
>   			size = (REG_GET_FIELD(viewport,
>   					      HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_HEIGHT) *
> @@ -1150,6 +1152,14 @@ static unsigned gmc_v9_0_get_vbios_fb_size(struct amdgpu_device *adev)
>   					      HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_WIDTH) *
>   				4);
>   			break;
> +		case IP_VERSION(2, 1, 0):
> +			viewport = RREG32_SOC15(DCE, 0, DCN2_mmHUBP0_DCSURF_PRI_VIEWPORT_DIMENSION);
> +			size = (REG_GET_FIELD(viewport,
> +					      HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_HEIGHT) *
> +				REG_GET_FIELD(viewport,
> +					      HUBP0_DCSURF_PRI_VIEWPORT_DIMENSION, PRI_VIEWPORT_WIDTH) *
> +				4);
> +			break;
>   		default:
>   			viewport = RREG32_SOC15(DCE, 0, mmSCL0_VIEWPORT_SIZE);
>   			size = (REG_GET_FIELD(viewport, SCL0_VIEWPORT_SIZE, VIEWPORT_HEIGHT) *



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