[PATCH 1/2] drm/amd/pm: add get_dpm_ultimate_freq function for cyan skillfish

[Lang Yu]

On 01/24/ , Lazar, Lijo wrote:
> 
> 
> On 1/24/2022 12:13 PM, Lang Yu wrote:
> > Some clients(e.g., kfd) query sclk/mclk through this function.
> > 
> > Before this patch:
> >   # /opt/rocm/opencl/bin/clinfo
> > 
> >   Max clock frequency:                           0Mhz
> > 
> > After this patch:
> >   # /opt/rocm/opencl/bin/clinfo
> > 
> >   Max clock frequency:                           1500Mhz
> > 
> > Signed-off-by: Lang Yu <Lang.Yu at amd.com>
> > ---
> >   drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c | 9 +++++++++
> >   1 file changed, 9 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
> > index 2238ee19c222..665905a568eb 100644
> > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
> > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
> > @@ -552,6 +552,14 @@ static int cyan_skillfish_od_edit_dpm_table(struct smu_context *smu,
> >   	return ret;
> >   }
> > +static int cyan_skillfish_get_dpm_ultimate_freq(struct smu_context *smu,
> > +						enum smu_clk_type clk_type,
> > +						uint32_t *min,
> > +						uint32_t *max)
> > +{
> > +	return cyan_skillfish_get_current_clk_freq(smu, clk_type, min ? min : max);
> > +}
> > +
> 
> I see the below logic already there and this patch doesn't match with that.
> 
>         case SMU_GFXCLK:
>                 ret = cyan_skillfish_get_current_clk_freq(smu, clk_type,
> &cur_value);
>                 if (ret)
>                         return ret;
>                 if (cur_value  == CYAN_SKILLFISH_SCLK_MAX)
>                         i = 2;
>                 else if (cur_value == CYAN_SKILLFISH_SCLK_MIN)
>                         i = 0;
>                 else
>                         i = 1;
>                 size += sysfs_emit_at(buf, size, "0: %uMhz %s\n",
> CYAN_SKILLFISH_SCLK_MIN,
>                                 i == 0 ? "*" : "");
>                 size += sysfs_emit_at(buf, size, "1: %uMhz %s\n",
>                                 i == 1 ? cur_value :
> cyan_skillfish_sclk_default,
>                                 i == 1 ? "*" : "");
>                 size += sysfs_emit_at(buf, size, "2: %uMhz %s\n",
> CYAN_SKILLFISH_SCLK_MAX,
>                                 i == 2 ? "*" : "");
>                 break;

Thanks for your comments. To maintain the logic, for sclk,
just set min/max to CYAN_SKILLFISH_SCLK_MIN/CYAN_SKILLFISH_SCLK_MAX.
For others, set min=max=current. What do you think? Thanks!

Regards,
Lang

> 
> Thanks,
> Lijo
> 
> >   static const struct pptable_funcs cyan_skillfish_ppt_funcs = {
> >   	.check_fw_status = smu_v11_0_check_fw_status,
> > @@ -565,6 +573,7 @@ static const struct pptable_funcs cyan_skillfish_ppt_funcs = {
> >   	.is_dpm_running = cyan_skillfish_is_dpm_running,
> >   	.get_gpu_metrics = cyan_skillfish_get_gpu_metrics,
> >   	.od_edit_dpm_table = cyan_skillfish_od_edit_dpm_table,
> > +	.get_dpm_ultimate_freq = cyan_skillfish_get_dpm_ultimate_freq,
> >   	.register_irq_handler = smu_v11_0_register_irq_handler,
> >   	.notify_memory_pool_location = smu_v11_0_notify_memory_pool_location,
> >   	.send_smc_msg_with_param = smu_cmn_send_smc_msg_with_param,
> >