[PATCH] drm/amdgpu/display: Remove t_srx_delay_us.

[Alex Deucher]

Applied.  Thanks!

Alex

On Tue, Jan 25, 2022 at 12:53 PM Harry Wentland <harry.wentland at amd.com> wrote:
>
> On 2022-01-22 21:38, Bas Nieuwenhuizen wrote:
> > Unused. Convert the divisions into asserts on the divisor, to
> > debug why it is zero. The divide by zero is suspected of causing
> > kernel panics.
> >
> > While I have no idea where the zero is coming from I think this
> > patch is a positive either way.
> >
> > Signed-off-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
>
> Reviewed-by: Harry Wentland <harry.wentland at amd.com>
>
> Harry
>
> > ---
> >  drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c          | 1 -
> >  .../gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c | 2 --
> >  .../drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c   | 2 --
> >  .../gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c | 2 --
> >  .../gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c | 2 --
> >  drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h     | 1 -
> >  drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c   | 3 ---
> >  drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c | 4 ----
> >  8 files changed, 17 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c b/drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c
> > index ec19678a0702..e447c74be713 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c
> > @@ -503,7 +503,6 @@ static void dcn_bw_calc_rq_dlg_ttu(
> >       //input[in_idx].dout.output_standard;
> >
> >       /*todo: soc->sr_enter_plus_exit_time??*/
> > -     dlg_sys_param->t_srx_delay_us = dc->dcn_ip->dcfclk_cstate_latency / v->dcf_clk_deep_sleep;
> >
> >       dml1_rq_dlg_get_rq_params(dml, rq_param, &input->pipe.src);
> >       dml1_extract_rq_regs(dml, rq_regs, rq_param);
> > diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
> > index 246071c72f6b..548cdef8a8ad 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c
> > @@ -1576,8 +1576,6 @@ void dml20_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib,
> >       dlg_sys_param.total_flip_bytes = get_total_immediate_flip_bytes(mode_lib,
> >                       e2e_pipe_param,
> >                       num_pipes);
> > -     dlg_sys_param.t_srx_delay_us = mode_lib->ip.dcfclk_cstate_latency
> > -                     / dlg_sys_param.deepsleep_dcfclk_mhz; // TODO: Deprecated
> >
> >       print__dlg_sys_params_st(mode_lib, &dlg_sys_param);
> >
> > diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
> > index 015e7f2c0b16..0fc9f3e3ffae 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
> > @@ -1577,8 +1577,6 @@ void dml20v2_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib,
> >       dlg_sys_param.total_flip_bytes = get_total_immediate_flip_bytes(mode_lib,
> >                       e2e_pipe_param,
> >                       num_pipes);
> > -     dlg_sys_param.t_srx_delay_us = mode_lib->ip.dcfclk_cstate_latency
> > -                     / dlg_sys_param.deepsleep_dcfclk_mhz; // TODO: Deprecated
> >
> >       print__dlg_sys_params_st(mode_lib, &dlg_sys_param);
> >
> > diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
> > index 8bc27de4c104..618f4b682ab1 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c
> > @@ -1688,8 +1688,6 @@ void dml21_rq_dlg_get_dlg_reg(
> >                       mode_lib,
> >                       e2e_pipe_param,
> >                       num_pipes);
> > -     dlg_sys_param.t_srx_delay_us = mode_lib->ip.dcfclk_cstate_latency
> > -                     / dlg_sys_param.deepsleep_dcfclk_mhz; // TODO: Deprecated
> >
> >       print__dlg_sys_params_st(mode_lib, &dlg_sys_param);
> >
> > diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
> > index aef854270054..747167083dea 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c
> > @@ -1858,8 +1858,6 @@ void dml30_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib,
> >       dlg_sys_param.total_flip_bytes = get_total_immediate_flip_bytes(mode_lib,
> >               e2e_pipe_param,
> >               num_pipes);
> > -     dlg_sys_param.t_srx_delay_us = mode_lib->ip.dcfclk_cstate_latency
> > -             / dlg_sys_param.deepsleep_dcfclk_mhz; // TODO: Deprecated
> >
> >       print__dlg_sys_params_st(mode_lib, &dlg_sys_param);
> >
> > diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
> > index d46a2733024c..8f9f1d607f7c 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
> > +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
> > @@ -546,7 +546,6 @@ struct _vcs_dpi_display_dlg_sys_params_st {
> >       double t_sr_wm_us;
> >       double t_extra_us;
> >       double mem_trip_us;
> > -     double t_srx_delay_us;
> >       double deepsleep_dcfclk_mhz;
> >       double total_flip_bw;
> >       unsigned int total_flip_bytes;
> > diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c b/drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c
> > index 71ea503cb32f..412e75eb4704 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c
> > @@ -141,9 +141,6 @@ void print__dlg_sys_params_st(struct display_mode_lib *mode_lib, const struct _v
> >       dml_print("DML_RQ_DLG_CALC:    t_urg_wm_us          = %3.2f\n", dlg_sys_param->t_urg_wm_us);
> >       dml_print("DML_RQ_DLG_CALC:    t_sr_wm_us           = %3.2f\n", dlg_sys_param->t_sr_wm_us);
> >       dml_print("DML_RQ_DLG_CALC:    t_extra_us           = %3.2f\n", dlg_sys_param->t_extra_us);
> > -     dml_print(
> > -                     "DML_RQ_DLG_CALC:    t_srx_delay_us       = %3.2f\n",
> > -                     dlg_sys_param->t_srx_delay_us);
> >       dml_print(
> >                       "DML_RQ_DLG_CALC:    deepsleep_dcfclk_mhz = %3.2f\n",
> >                       dlg_sys_param->deepsleep_dcfclk_mhz);
> > diff --git a/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c b/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
> > index 59dc2c5b58dd..3df559c591f8 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
> > @@ -1331,10 +1331,6 @@ void dml1_rq_dlg_get_dlg_params(
> >       if (dual_plane)
> >               DTRACE("DLG: %s: swath_height_c     = %d", __func__, swath_height_c);
> >
> > -     DTRACE(
> > -                     "DLG: %s: t_srx_delay_us     = %3.2f",
> > -                     __func__,
> > -                     (double) dlg_sys_param->t_srx_delay_us);
> >       DTRACE("DLG: %s: line_time_in_us    = %3.2f", __func__, (double) line_time_in_us);
> >       DTRACE("DLG: %s: vupdate_offset     = %d", __func__, vupdate_offset);
> >       DTRACE("DLG: %s: vupdate_width      = %d", __func__, vupdate_width);
>