[PATCH V3 6/7] drm/amd/pm: avoid consecutive retrieving for enabled ppfeatures
Deucher, Alexander
Alexander.Deucher at amd.com
Fri Jan 28 14:56:15 UTC 2022
[Public]
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
________________________________
From: Quan, Evan <Evan.Quan at amd.com>
Sent: Friday, January 28, 2022 2:04 AM
To: amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>
Cc: Deucher, Alexander <Alexander.Deucher at amd.com>; Lazar, Lijo <Lijo.Lazar at amd.com>; Quan, Evan <Evan.Quan at amd.com>
Subject: [PATCH V3 6/7] drm/amd/pm: avoid consecutive retrieving for enabled ppfeatures
As the enabled ppfeatures are just retrieved ahead. We can use
that directly instead of retrieving again and again.
Signed-off-by: Evan Quan <evan.quan at amd.com>
Change-Id: I08827437fcbbc52084418c8ca6a90cfa503306a9
---
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
index 3d263b27b6c2..acb9f0ca191b 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c
@@ -680,6 +680,7 @@ size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
int8_t sort_feature[SMU_FEATURE_COUNT];
size_t size = 0;
int ret = 0, i;
+ int feature_id;
ret = smu_cmn_get_enabled_mask(smu,
&feature_mask);
@@ -708,11 +709,18 @@ size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
if (sort_feature[i] < 0)
continue;
+ /* convert to asic spcific feature ID */
+ feature_id = smu_cmn_to_asic_specific_index(smu,
+ CMN2ASIC_MAPPING_FEATURE,
+ sort_feature[i]);
+ if (feature_id < 0)
+ continue;
+
size += sysfs_emit_at(buf, size, "%02d. %-20s (%2d) : %s\n",
count++,
smu_get_feature_name(smu, sort_feature[i]),
i,
- !!smu_cmn_feature_is_enabled(smu, sort_feature[i]) ?
+ !!test_bit(feature_id, (unsigned long *)&feature_mask) ?
"enabled" : "disabled");
}
--
2.29.0
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