[PATCH v2] drm/amd/display: Force link_rate as LINK_RATE_RBR2 for 2018 15" Apple Retina panels

Alex Deucher alexdeucher at gmail.com
Mon Jan 31 20:17:56 UTC 2022


Applied.  Thanks!

Alex

On Sat, Jan 29, 2022 at 12:50 AM Aditya Garg <gargaditya08 at live.com> wrote:
>
> From: Aun-Ali Zaidi <admin at kodeit.net>
>
> The eDP link rate reported by the DP_MAX_LINK_RATE dpcd register (0xa) is
> contradictory to the highest rate supported reported by
> EDID (0xc = LINK_RATE_RBR2). The effects of this compounded with commit
> '4a8ca46bae8a ("drm/amd/display: Default max bpc to 16 for eDP")' results
> in no display modes being found and a dark panel.
>
> For now, simply force the maximum supported link rate for the eDP attached
> 2018 15" Apple Retina panels.
>
> Additionally, we must also check the firmware revision since the device ID
> reported by the DPCD is identical to that of the more capable 16,1,
> incorrectly quirking it. We also use said firmware check to quirk the
> refreshed 15,1 models with Vega graphics as they use a slightly newer
> firmware version.
>
> Tested-by: Aun-Ali Zaidi <admin at kodeit.net>
> Reviewed-by: Harry Wentland <harry.wentland at amd.com>
> Signed-off-by: Aun-Ali Zaidi <admin at kodeit.net>
> Signed-off-by: Aditya Garg <gargaditya08 at live.com>
> ---
> v2 :- Use C styled comments
>  .../gpu/drm/amd/display/dc/core/dc_link_dp.c  | 20 +++++++++++++++++++
>  1 file changed, 20 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> index 05e216524..086f7ee2c 100644
> --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> @@ -5597,6 +5597,26 @@ static bool retrieve_link_cap(struct dc_link *link)
>                 dp_hw_fw_revision.ieee_fw_rev,
>                 sizeof(dp_hw_fw_revision.ieee_fw_rev));
>
> +       /* Quirk for Apple MBP 2018 15" Retina panels: wrong DP_MAX_LINK_RATE */
> +       {
> +               uint8_t str_mbp_2018[] = { 101, 68, 21, 103, 98, 97 };
> +               uint8_t fwrev_mbp_2018[] = { 7, 4 };
> +               uint8_t fwrev_mbp_2018_vega[] = { 8, 4 };
> +
> +               /* We also check for the firmware revision as 16,1 models have an
> +                * identical device id and are incorrectly quirked otherwise.
> +                */
> +               if ((link->dpcd_caps.sink_dev_id == 0x0010fa) &&
> +                   !memcmp(link->dpcd_caps.sink_dev_id_str, str_mbp_2018,
> +                            sizeof(str_mbp_2018)) &&
> +                   (!memcmp(link->dpcd_caps.sink_fw_revision, fwrev_mbp_2018,
> +                            sizeof(fwrev_mbp_2018)) ||
> +                   !memcmp(link->dpcd_caps.sink_fw_revision, fwrev_mbp_2018_vega,
> +                            sizeof(fwrev_mbp_2018_vega)))) {
> +                       link->reported_link_cap.link_rate = LINK_RATE_RBR2;
> +               }
> +       }
> +
>         memset(&link->dpcd_caps.dsc_caps, '\0',
>                         sizeof(link->dpcd_caps.dsc_caps));
>         memset(&link->dpcd_caps.fec_cap, '\0', sizeof(link->dpcd_caps.fec_cap));
> --
> 2.25.1
>
>


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