[PATCH] drm/amdgpu: fix scratch register access method in SRIOV

[Christian König]

Am 18.07.22 um 21:32 schrieb Gavin Wan:
> The scratch register should be accessed through MMIO instead of RLCG
> in SRIOV, since it being used in RLCG register access function.
>
> Fixes: 0e1314781b9c("drm/amdgpu: nuke dynamic gfx scratch reg allocation")
>
> Signed-off-by: Gavin Wan <Gavin.Wan at amd.com>
> Change-Id: I888cb3b96856583e764b35a098bcf8bff01ad90c

Reviewed-by: Christian König <christian.koenig at amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 5349ca4d19e3..c6e0f9313a7f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -987,23 +987,23 @@ static void gfx_v9_0_wait_reg_mem(struct amdgpu_ring *ring, int eng_sel,
>   static int gfx_v9_0_ring_test_ring(struct amdgpu_ring *ring)
>   {
>   	struct amdgpu_device *adev = ring->adev;
> +	uint32_t scratch = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0);
>   	uint32_t tmp = 0;
>   	unsigned i;
>   	int r;
>   
> -	WREG32_SOC15(GC, 0, mmSCRATCH_REG0, 0xCAFEDEAD);
> +	WREG32(scratch, 0xCAFEDEAD);
>   	r = amdgpu_ring_alloc(ring, 3);
>   	if (r)
>   		return r;
>   
>   	amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));
> -	amdgpu_ring_write(ring, SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0) -
> -			  PACKET3_SET_UCONFIG_REG_START);
> +	amdgpu_ring_write(ring, scratch - PACKET3_SET_UCONFIG_REG_START);
>   	amdgpu_ring_write(ring, 0xDEADBEEF);
>   	amdgpu_ring_commit(ring);
>   
>   	for (i = 0; i < adev->usec_timeout; i++) {
> -		tmp = RREG32_SOC15(GC, 0, mmSCRATCH_REG0);
> +		tmp = RREG32(scratch);
>   		if (tmp == 0xDEADBEEF)
>   			break;
>   		udelay(1);