[PATCH 3/6] drm/amdgpu: add a compute pipe reset for SR-IOV

[Horace Chen]

[Why]
Under SR-IOV, we are not sure whether pipe status is
good or not when doing initialization. The compute engine
maybe fail to bringup if pipe status is bad.

[How]
For SR-IOV, disable the compute engine to do a pipe reset
before we do initialization.

Signed-off-by: Horace Chen <horace.chen at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 0d8193b30fc5..b8f197a5ee84 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -4586,8 +4586,12 @@ static int gfx_v11_0_hw_init(void *handle)
 		DRM_WARN("Invalid gb_addr_config !\n");
 
 	if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP &&
-	    adev->gfx.rs64_enable)
+	    adev->gfx.rs64_enable) {
+		if (amdgpu_sriov_vf(adev))
+			gfx_v11_0_cp_compute_enable(adev, false);
+
 		gfx_v11_0_config_gfx_rs64(adev);
+	}
 
 	r = gfx_v11_0_gfxhub_enable(adev);
 	if (r)
-- 
2.25.1