[PATCH 4/6] drm/amdgpu: enable WPTR_POLL_ENABLE for sriov on sdma_v6_0
Alex Deucher
alexdeucher at gmail.com
Fri Jul 22 13:15:53 UTC 2022
On Thu, Jul 21, 2022 at 5:52 AM Horace Chen <horace.chen at amd.com> wrote:
>
> [Why]
> Under SR-IOV, if VF is switched out then its doorbell will be disabled,
> SDMA rely on WPTR_POLL to get doorbells which was sent during VF
> switched-out time.
>
> [How]
> For SR-IOV, set SDMA WPTR_POLL_ENABLE to 1.
>
> Signed-off-by: Horace Chen <horace.chen at amd.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
> index 0200cb3a31a4..23b01b121492 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
> @@ -593,7 +593,10 @@ static int sdma_v6_0_gfx_resume(struct amdgpu_device *adev)
> lower_32_bits(ring->rptr_gpu_addr) & 0xFFFFFFFC);
>
> rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, RPTR_WRITEBACK_ENABLE, 1);
> - rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, WPTR_POLL_ENABLE, 0);
> + if (amdgpu_sriov_vf(adev))
> + rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, WPTR_POLL_ENABLE, 1);
> + else
> + rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, WPTR_POLL_ENABLE, 0);
> rb_cntl = REG_SET_FIELD(rb_cntl, SDMA0_QUEUE0_RB_CNTL, F32_WPTR_POLL_ENABLE, 1);
>
> WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_RB_BASE), ring->gpu_addr >> 8);
> --
> 2.25.1
>
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