[PATCH 5/6] drm/amdgpu: refine virtualization psp fw skip check
Alex Deucher
alexdeucher at gmail.com
Fri Jul 22 13:17:11 UTC 2022
On Thu, Jul 21, 2022 at 5:52 AM Horace Chen <horace.chen at amd.com> wrote:
>
> SR-IOV may need to load different firmwares for different ASIC inside
> VF.
> So create a new function in amdgpu_virt to check whether FW load needs
> to be skipped.
>
> Signed-off-by: Horace Chen <horace.chen at amd.com>
Acked-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 17 +++-----------
> drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 29 ++++++++++++++++++++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 2 ++
> 3 files changed, 34 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> index 6540582ecbf8..a601d0f67b1f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> @@ -334,11 +334,12 @@ static int psp_init_sriov_microcode(struct psp_context *psp)
> ret = psp_init_cap_microcode(psp, "aldebaran");
> ret &= psp_init_ta_microcode(psp, "aldebaran");
> break;
> + case IP_VERSION(13, 0, 0):
> + break;
> default:
> BUG();
> break;
> }
> -
> return ret;
> }
>
> @@ -2389,19 +2390,7 @@ static bool fw_load_skip_check(struct psp_context *psp,
> return true;
>
> if (amdgpu_sriov_vf(psp->adev) &&
> - (ucode->ucode_id == AMDGPU_UCODE_ID_SDMA0
> - || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA1
> - || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA2
> - || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA3
> - || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA4
> - || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA5
> - || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA6
> - || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA7
> - || ucode->ucode_id == AMDGPU_UCODE_ID_RLC_G
> - || ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL
> - || ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM
> - || ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM
> - || ucode->ucode_id == AMDGPU_UCODE_ID_SMC))
> + amdgpu_virt_fw_load_skip_check(psp->adev, ucode->ucode_id))
> /*skip ucode loading in SRIOV VF */
> return true;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
> index ab55602ff534..ba367799d087 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
> @@ -807,6 +807,35 @@ enum amdgpu_sriov_vf_mode amdgpu_virt_get_sriov_vf_mode(struct amdgpu_device *ad
> return mode;
> }
>
> +bool amdgpu_virt_fw_load_skip_check(struct amdgpu_device *adev, uint32_t ucode_id)
> +{
> + /* this version doesn't support sriov autoload */
> + if (adev->ip_versions[MP0_HWIP][0] == IP_VERSION(13, 0, 0)) {
> + if (ucode_id == AMDGPU_UCODE_ID_VCN1 ||
> + ucode_id == AMDGPU_UCODE_ID_VCN)
> + return false;
> + else
> + return true;
> + }
> +
> + if (ucode_id == AMDGPU_UCODE_ID_SDMA0
> + || ucode_id == AMDGPU_UCODE_ID_SDMA1
> + || ucode_id == AMDGPU_UCODE_ID_SDMA2
> + || ucode_id == AMDGPU_UCODE_ID_SDMA3
> + || ucode_id == AMDGPU_UCODE_ID_SDMA4
> + || ucode_id == AMDGPU_UCODE_ID_SDMA5
> + || ucode_id == AMDGPU_UCODE_ID_SDMA6
> + || ucode_id == AMDGPU_UCODE_ID_SDMA7
> + || ucode_id == AMDGPU_UCODE_ID_RLC_G
> + || ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL
> + || ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM
> + || ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM
> + || ucode_id == AMDGPU_UCODE_ID_SMC)
> + return true;
> +
> + return false;
> +}
> +
> void amdgpu_virt_update_sriov_video_codec(struct amdgpu_device *adev,
> struct amdgpu_video_codec_info *encode, uint32_t encode_array_size,
> struct amdgpu_video_codec_info *decode, uint32_t decode_array_size)
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
> index 239f232f9c02..cd6fce05978f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
> @@ -343,4 +343,6 @@ void amdgpu_sriov_wreg(struct amdgpu_device *adev,
> u32 acc_flags, u32 hwip);
> u32 amdgpu_sriov_rreg(struct amdgpu_device *adev,
> u32 offset, u32 acc_flags, u32 hwip);
> +bool amdgpu_virt_fw_load_skip_check(struct amdgpu_device *adev,
> + uint32_t ucode_id);
> #endif
> --
> 2.25.1
>
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