[PATCH] drm/amdgpu: correct RLC_RLCS_BOOTLOAD_STATUS offset and index

[Huang, Tim]

[AMD Official Use Only - General]

Reviewed-by: Tim Huang <Tim.Huang at amd.com>


Best Regards,
Tim Huang

-----Original Message-----
From: Zhang, Yifan <Yifan1.Zhang at amd.com>
Sent: Saturday, July 23, 2022 8:42 PM
To: amd-gfx at lists.freedesktop.org
Cc: Huang, Tim <Tim.Huang at amd.com>; Deucher, Alexander <Alexander.Deucher at amd.com>; Du, Xiaojian <Xiaojian.Du at amd.com>; Zhang, Yifan <Yifan1.Zhang at amd.com>
Subject: [PATCH] drm/amdgpu: correct RLC_RLCS_BOOTLOAD_STATUS offset and index

this patch corrects RLC_RLCS_BOOTLOAD_STATUS offset and index for GC 11.0.1

Signed-off-by: Yifan Zhang <yifan1.zhang at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 0787a965615b..fb9aefb1b404 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -77,6 +77,9 @@
 #define regICG_SQ_CLK_CTRL_BASE_IDX                                                                     1
 #define regSPI_GFX_CRAWLER_CONFIG                                                                       0x1296
 #define regSPI_GFX_CRAWLER_CONFIG_BASE_IDX                                                              0
+#define regRLC_RLCS_BOOTLOAD_STATUS_gc_11_0_1                                                           0x4e7e
+#define regRLC_RLCS_BOOTLOAD_STATUS_gc_11_0_1_BASE_IDX                                                  1
+

 MODULE_FIRMWARE("amdgpu/gc_11_0_0_pfp.bin");
 MODULE_FIRMWARE("amdgpu/gc_11_0_0_me.bin");
@@ -2800,7 +2803,10 @@ static int gfx_v11_0_wait_for_rlc_autoload_complete(struct amdgpu_device *adev)

        for (i = 0; i < adev->usec_timeout; i++) {
                cp_status = RREG32_SOC15(GC, 0, regCP_STAT);
-               bootload_status = RREG32_SOC15(GC, 0, regRLC_RLCS_BOOTLOAD_STATUS);
+               if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(11, 0, 1))
+                       bootload_status = RREG32_SOC15(GC, 0, regRLC_RLCS_BOOTLOAD_STATUS_gc_11_0_1);
+               else
+                       bootload_status = RREG32_SOC15(GC, 0, regRLC_RLCS_BOOTLOAD_STATUS);
                if ((cp_status == 0) &&
                    (REG_GET_FIELD(bootload_status,
                        RLC_RLCS_BOOTLOAD_STATUS, BOOTLOAD_COMPLETE) == 1)) {
--
2.37.1