[PATCH 08/16] drm/amd/display: Remove some XFC variables from VBA
Maíra Canal
mairacanal at riseup.net
Thu Jul 28 18:20:40 UTC 2022
The variables XFCSupported, XFCTSlvVupdateOffset, XFCSlaveVupdateWidth,
XFCSlaveVReadyOffset, XFCTransferDelay, XFCPrechargeDelay,
XFCRemoteSurfaceFlipLatency and XFCPrefetchMargin are are only
used on assignments, so their values are not used on code. So, remove
the variables entries from the struct vba_vars_st.
Signed-off-by: Maíra Canal <mairacanal at riseup.net>
---
.../dc/dml/dcn20/display_mode_vba_20.c | 38 -------------------
.../dc/dml/dcn20/display_mode_vba_20v2.c | 38 -------------------
.../dc/dml/dcn21/display_mode_vba_21.c | 38 -------------------
.../drm/amd/display/dc/dml/display_mode_vba.c | 1 -
.../drm/amd/display/dc/dml/display_mode_vba.h | 8 ----
5 files changed, 123 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
index 1424aa7a5018..7effe4be61b2 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c
@@ -2580,9 +2580,6 @@ static void dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPer
if (mode_lib->vba.XFCEnabled[k] == true) {
double TWait;
- mode_lib->vba.XFCSlaveVUpdateOffset[k] = mode_lib->vba.XFCTSlvVupdateOffset;
- mode_lib->vba.XFCSlaveVupdateWidth[k] = mode_lib->vba.XFCTSlvVupdateWidth;
- mode_lib->vba.XFCSlaveVReadyOffset[k] = mode_lib->vba.XFCTSlvVreadyOffset;
TWait = CalculateTWait(
mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb],
mode_lib->vba.DRAMClockChangeLatency,
@@ -2606,26 +2603,6 @@ static void dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPer
&mode_lib->vba.SrcActiveDrainRate,
&mode_lib->vba.TInitXFill,
&mode_lib->vba.TslvChk);
- mode_lib->vba.XFCRemoteSurfaceFlipLatency[k] =
- dml_floor(
- mode_lib->vba.XFCRemoteSurfaceFlipDelay
- / (mode_lib->vba.HTotal[k]
- / mode_lib->vba.PixelClock[k]),
- 1);
- mode_lib->vba.XFCTransferDelay[k] =
- dml_ceil(
- mode_lib->vba.XFCBusTransportTime
- / (mode_lib->vba.HTotal[k]
- / mode_lib->vba.PixelClock[k]),
- 1);
- mode_lib->vba.XFCPrechargeDelay[k] =
- dml_ceil(
- (mode_lib->vba.XFCBusTransportTime
- + mode_lib->vba.TInitXFill
- + mode_lib->vba.TslvChk)
- / (mode_lib->vba.HTotal[k]
- / mode_lib->vba.PixelClock[k]),
- 1);
mode_lib->vba.InitFillLevel = mode_lib->vba.XFCXBUFLatencyTolerance
* mode_lib->vba.SrcActiveDrainRate;
mode_lib->vba.FinalFillMargin =
@@ -2644,21 +2621,6 @@ static void dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPer
mode_lib->vba.TFinalxFill = mode_lib->vba.RemainingFillLevel
/ (mode_lib->vba.SrcActiveDrainRate
* mode_lib->vba.XFCFillBWOverhead / 100);
- mode_lib->vba.XFCPrefetchMargin[k] =
- mode_lib->vba.XFCRemoteSurfaceFlipDelay
- + mode_lib->vba.TFinalxFill
- + (mode_lib->vba.DestinationLinesToRequestVMInVBlank[k]
- + mode_lib->vba.DestinationLinesToRequestRowInVBlank[k])
- * mode_lib->vba.HTotal[k]
- / mode_lib->vba.PixelClock[k];
- } else {
- mode_lib->vba.XFCSlaveVUpdateOffset[k] = 0;
- mode_lib->vba.XFCSlaveVupdateWidth[k] = 0;
- mode_lib->vba.XFCSlaveVReadyOffset[k] = 0;
- mode_lib->vba.XFCRemoteSurfaceFlipLatency[k] = 0;
- mode_lib->vba.XFCPrechargeDelay[k] = 0;
- mode_lib->vba.XFCTransferDelay[k] = 0;
- mode_lib->vba.XFCPrefetchMargin[k] = 0;
}
}
{
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
index 03613dbb3e61..a23b400f615b 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
@@ -2653,9 +2653,6 @@ static void dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndP
if (mode_lib->vba.XFCEnabled[k] == true) {
double TWait;
- mode_lib->vba.XFCSlaveVUpdateOffset[k] = mode_lib->vba.XFCTSlvVupdateOffset;
- mode_lib->vba.XFCSlaveVupdateWidth[k] = mode_lib->vba.XFCTSlvVupdateWidth;
- mode_lib->vba.XFCSlaveVReadyOffset[k] = mode_lib->vba.XFCTSlvVreadyOffset;
TWait = CalculateTWait(
mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb],
mode_lib->vba.DRAMClockChangeLatency,
@@ -2679,26 +2676,6 @@ static void dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndP
&mode_lib->vba.SrcActiveDrainRate,
&mode_lib->vba.TInitXFill,
&mode_lib->vba.TslvChk);
- mode_lib->vba.XFCRemoteSurfaceFlipLatency[k] =
- dml_floor(
- mode_lib->vba.XFCRemoteSurfaceFlipDelay
- / (mode_lib->vba.HTotal[k]
- / mode_lib->vba.PixelClock[k]),
- 1);
- mode_lib->vba.XFCTransferDelay[k] =
- dml_ceil(
- mode_lib->vba.XFCBusTransportTime
- / (mode_lib->vba.HTotal[k]
- / mode_lib->vba.PixelClock[k]),
- 1);
- mode_lib->vba.XFCPrechargeDelay[k] =
- dml_ceil(
- (mode_lib->vba.XFCBusTransportTime
- + mode_lib->vba.TInitXFill
- + mode_lib->vba.TslvChk)
- / (mode_lib->vba.HTotal[k]
- / mode_lib->vba.PixelClock[k]),
- 1);
mode_lib->vba.InitFillLevel = mode_lib->vba.XFCXBUFLatencyTolerance
* mode_lib->vba.SrcActiveDrainRate;
mode_lib->vba.FinalFillMargin =
@@ -2717,21 +2694,6 @@ static void dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndP
mode_lib->vba.TFinalxFill = mode_lib->vba.RemainingFillLevel
/ (mode_lib->vba.SrcActiveDrainRate
* mode_lib->vba.XFCFillBWOverhead / 100);
- mode_lib->vba.XFCPrefetchMargin[k] =
- mode_lib->vba.XFCRemoteSurfaceFlipDelay
- + mode_lib->vba.TFinalxFill
- + (mode_lib->vba.DestinationLinesToRequestVMInVBlank[k]
- + mode_lib->vba.DestinationLinesToRequestRowInVBlank[k])
- * mode_lib->vba.HTotal[k]
- / mode_lib->vba.PixelClock[k];
- } else {
- mode_lib->vba.XFCSlaveVUpdateOffset[k] = 0;
- mode_lib->vba.XFCSlaveVupdateWidth[k] = 0;
- mode_lib->vba.XFCSlaveVReadyOffset[k] = 0;
- mode_lib->vba.XFCRemoteSurfaceFlipLatency[k] = 0;
- mode_lib->vba.XFCPrechargeDelay[k] = 0;
- mode_lib->vba.XFCTransferDelay[k] = 0;
- mode_lib->vba.XFCPrefetchMargin[k] = 0;
}
}
{
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
index ae03f1a3c9f0..4ba9fa17ea39 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
@@ -2589,9 +2589,6 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
if (mode_lib->vba.XFCEnabled[k] == true) {
double TWait;
- locals->XFCSlaveVUpdateOffset[k] = mode_lib->vba.XFCTSlvVupdateOffset;
- locals->XFCSlaveVupdateWidth[k] = mode_lib->vba.XFCTSlvVupdateWidth;
- locals->XFCSlaveVReadyOffset[k] = mode_lib->vba.XFCTSlvVreadyOffset;
TWait = CalculateTWait(
mode_lib->vba.PrefetchMode[mode_lib->vba.VoltageLevel][mode_lib->vba.maxMpcComb],
mode_lib->vba.DRAMClockChangeLatency,
@@ -2615,26 +2612,6 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
&mode_lib->vba.SrcActiveDrainRate,
&mode_lib->vba.TInitXFill,
&mode_lib->vba.TslvChk);
- locals->XFCRemoteSurfaceFlipLatency[k] =
- dml_floor(
- mode_lib->vba.XFCRemoteSurfaceFlipDelay
- / (mode_lib->vba.HTotal[k]
- / mode_lib->vba.PixelClock[k]),
- 1);
- locals->XFCTransferDelay[k] =
- dml_ceil(
- mode_lib->vba.XFCBusTransportTime
- / (mode_lib->vba.HTotal[k]
- / mode_lib->vba.PixelClock[k]),
- 1);
- locals->XFCPrechargeDelay[k] =
- dml_ceil(
- (mode_lib->vba.XFCBusTransportTime
- + mode_lib->vba.TInitXFill
- + mode_lib->vba.TslvChk)
- / (mode_lib->vba.HTotal[k]
- / mode_lib->vba.PixelClock[k]),
- 1);
mode_lib->vba.InitFillLevel = mode_lib->vba.XFCXBUFLatencyTolerance
* mode_lib->vba.SrcActiveDrainRate;
mode_lib->vba.FinalFillMargin =
@@ -2653,21 +2630,6 @@ static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
mode_lib->vba.TFinalxFill = mode_lib->vba.RemainingFillLevel
/ (mode_lib->vba.SrcActiveDrainRate
* mode_lib->vba.XFCFillBWOverhead / 100);
- locals->XFCPrefetchMargin[k] =
- mode_lib->vba.XFCRemoteSurfaceFlipDelay
- + mode_lib->vba.TFinalxFill
- + (locals->DestinationLinesToRequestVMInVBlank[k]
- + locals->DestinationLinesToRequestRowInVBlank[k])
- * mode_lib->vba.HTotal[k]
- / mode_lib->vba.PixelClock[k];
- } else {
- locals->XFCSlaveVUpdateOffset[k] = 0;
- locals->XFCSlaveVupdateWidth[k] = 0;
- locals->XFCSlaveVReadyOffset[k] = 0;
- locals->XFCRemoteSurfaceFlipLatency[k] = 0;
- locals->XFCPrechargeDelay[k] = 0;
- locals->XFCTransferDelay[k] = 0;
- locals->XFCPrefetchMargin[k] = 0;
}
}
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
index 316153ece160..7a4a013f195a 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
@@ -489,7 +489,6 @@ static void fetch_ip_params(struct display_mode_lib *mode_lib)
mode_lib->vba.ODMCapability = ip->odm_capable;
mode_lib->vba.DISPCLKRampingMargin = ip->dispclk_ramp_margin_percent;
- mode_lib->vba.XFCSupported = ip->xfc_supported;
mode_lib->vba.XFCFillBWOverhead = ip->xfc_fill_bw_overhead_percent;
mode_lib->vba.XFCFillConstant = ip->xfc_fill_constant_bytes;
mode_lib->vba.DPPCLKDelaySubtotal = ip->dppclk_delay_subtotal;
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
index 518e599d74e2..91562c0d35f2 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
@@ -497,7 +497,6 @@ struct vba_vars_st {
unsigned int PTEBufferSizeInRequestsChroma;
double DISPCLKRampingMargin;
unsigned int MaxInterDCNTileRepeaters;
- bool XFCSupported;
double XFCSlvChunkSize;
double XFCFillBWOverhead;
double XFCFillConstant;
@@ -1041,13 +1040,6 @@ struct vba_vars_st {
unsigned int BlockHeight256BytesC[DC__NUM_DPP__MAX];
unsigned int BlockWidth256BytesY[DC__NUM_DPP__MAX];
unsigned int BlockWidth256BytesC[DC__NUM_DPP__MAX];
- double XFCSlaveVUpdateOffset[DC__NUM_DPP__MAX];
- double XFCSlaveVupdateWidth[DC__NUM_DPP__MAX];
- double XFCSlaveVReadyOffset[DC__NUM_DPP__MAX];
- double XFCTransferDelay[DC__NUM_DPP__MAX];
- double XFCPrechargeDelay[DC__NUM_DPP__MAX];
- double XFCRemoteSurfaceFlipLatency[DC__NUM_DPP__MAX];
- double XFCPrefetchMargin[DC__NUM_DPP__MAX];
unsigned int dpte_row_width_luma_ub[DC__NUM_DPP__MAX];
unsigned int dpte_row_width_chroma_ub[DC__NUM_DPP__MAX];
double FullDETBufferingTimeY[DC__NUM_DPP__MAX]; // WM
--
2.37.1
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