[PATCH 1/3] drm/amdgpu: use VRAM|GTT for a bunch of kernel allocations
Alex Deucher
alexdeucher at gmail.com
Thu Jun 2 17:17:05 UTC 2022
On Thu, Jun 2, 2022 at 12:12 PM Luben Tuikov <luben.tuikov at amd.com> wrote:
>
> From: Christian König <christian.koenig at amd.com>
>
> Technically all of those can use GTT as well, no need to force things
> into VRAM.
>
> Signed-off-by: Christian König <christian.koenig at amd.com>
> Acked-by: Luben Tuikov <luben.tuikov at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 7 +++++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 20 +++++++++++--------
> drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c | 9 ++++++---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 14 +++++++++----
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 3 ++-
> drivers/gpu/drm/amd/amdgpu/psp_v10_0.c | 3 ++-
> .../amd/pm/powerplay/smumgr/smu10_smumgr.c | 10 ++++------
We need to audit the new files which have been added since the time
this patch set was written. E.g., gfx_v10_.c and gfx_v11_0.c, and
psp_v11_0.c, swsmu, etc. have been added in the meantime.
Alex
> 7 files changed, 41 insertions(+), 25 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> index 16699158e00d8c..d799815a0f288f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> @@ -338,8 +338,11 @@ int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,
> * KIQ MQD no matter SRIOV or Bare-metal
> */
> r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE,
> - AMDGPU_GEM_DOMAIN_VRAM, &ring->mqd_obj,
> - &ring->mqd_gpu_addr, &ring->mqd_ptr);
> + AMDGPU_GEM_DOMAIN_VRAM |
> + AMDGPU_GEM_DOMAIN_GTT,
> + &ring->mqd_obj,
> + &ring->mqd_gpu_addr,
> + &ring->mqd_ptr);
> if (r) {
> dev_warn(adev->dev, "failed to create ring mqd ob (%d)", r);
> return r;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> index e9411c28d88ba8..116f7fa25aa636 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> @@ -748,9 +748,12 @@ static int psp_tmr_init(struct psp_context *psp)
> }
>
> pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
> - ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_SIZE(psp->adev),
> - AMDGPU_GEM_DOMAIN_VRAM,
> - &psp->tmr_bo, &psp->tmr_mc_addr, pptr);
> + ret = amdgpu_bo_create_kernel(psp->adev, tmr_size,
> + PSP_TMR_SIZE(psp->adev),
> + AMDGPU_GEM_DOMAIN_VRAM |
> + AMDGPU_GEM_DOMAIN_GTT,
> + &psp->tmr_bo, &psp->tmr_mc_addr,
> + pptr);
>
> return ret;
> }
> @@ -1039,7 +1042,8 @@ int psp_ta_init_shared_buf(struct psp_context *psp,
> * physical) for ta to host memory
> */
> return amdgpu_bo_create_kernel(psp->adev, mem_ctx->shared_mem_size,
> - PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM,
> + PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM |
> + AMDGPU_GEM_DOMAIN_GTT,
> &mem_ctx->shared_bo,
> &mem_ctx->shared_mc_addr,
> &mem_ctx->shared_buf);
> @@ -3397,10 +3401,10 @@ static ssize_t psp_usbc_pd_fw_sysfs_write(struct device *dev,
>
> /* LFB address which is aligned to 1MB boundary per PSP request */
> ret = amdgpu_bo_create_kernel(adev, usbc_pd_fw->size, 0x100000,
> - AMDGPU_GEM_DOMAIN_VRAM,
> - &fw_buf_bo,
> - &fw_pri_mc_addr,
> - &fw_pri_cpu_addr);
> + AMDGPU_GEM_DOMAIN_VRAM |
> + AMDGPU_GEM_DOMAIN_GTT,
> + &fw_buf_bo, &fw_pri_mc_addr,
> + &fw_pri_cpu_addr);
> if (ret)
> goto rel_buf;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> index 6373bfb47d55d7..c591ed6553fcc8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.c
> @@ -93,7 +93,8 @@ int amdgpu_gfx_rlc_init_sr(struct amdgpu_device *adev, u32 dws)
>
> /* allocate save restore block */
> r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE,
> - AMDGPU_GEM_DOMAIN_VRAM,
> + AMDGPU_GEM_DOMAIN_VRAM |
> + AMDGPU_GEM_DOMAIN_GTT,
> &adev->gfx.rlc.save_restore_obj,
> &adev->gfx.rlc.save_restore_gpu_addr,
> (void **)&adev->gfx.rlc.sr_ptr);
> @@ -130,7 +131,8 @@ int amdgpu_gfx_rlc_init_csb(struct amdgpu_device *adev)
> /* allocate clear state block */
> adev->gfx.rlc.clear_state_size = dws = adev->gfx.rlc.funcs->get_csb_size(adev);
> r = amdgpu_bo_create_kernel(adev, dws * 4, PAGE_SIZE,
> - AMDGPU_GEM_DOMAIN_VRAM,
> + AMDGPU_GEM_DOMAIN_VRAM |
> + AMDGPU_GEM_DOMAIN_GTT,
> &adev->gfx.rlc.clear_state_obj,
> &adev->gfx.rlc.clear_state_gpu_addr,
> (void **)&adev->gfx.rlc.cs_ptr);
> @@ -156,7 +158,8 @@ int amdgpu_gfx_rlc_init_cpt(struct amdgpu_device *adev)
> int r;
>
> r = amdgpu_bo_create_reserved(adev, adev->gfx.rlc.cp_table_size,
> - PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM,
> + PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM |
> + AMDGPU_GEM_DOMAIN_GTT,
> &adev->gfx.rlc.cp_table_obj,
> &adev->gfx.rlc.cp_table_gpu_addr,
> (void **)&adev->gfx.rlc.cp_table_ptr);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> index aa7acfabf360b0..10350387687e89 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> @@ -263,8 +263,11 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
> continue;
>
> r = amdgpu_bo_create_kernel(adev, bo_size, PAGE_SIZE,
> - AMDGPU_GEM_DOMAIN_VRAM, &adev->vcn.inst[i].vcpu_bo,
> - &adev->vcn.inst[i].gpu_addr, &adev->vcn.inst[i].cpu_addr);
> + AMDGPU_GEM_DOMAIN_VRAM |
> + AMDGPU_GEM_DOMAIN_GTT,
> + &adev->vcn.inst[i].vcpu_bo,
> + &adev->vcn.inst[i].gpu_addr,
> + &adev->vcn.inst[i].cpu_addr);
> if (r) {
> dev_err(adev->dev, "(%d) failed to allocate vcn bo\n", r);
> return r;
> @@ -285,8 +288,11 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
>
> if (adev->vcn.indirect_sram) {
> r = amdgpu_bo_create_kernel(adev, 64 * 2 * 4, PAGE_SIZE,
> - AMDGPU_GEM_DOMAIN_VRAM, &adev->vcn.inst[i].dpg_sram_bo,
> - &adev->vcn.inst[i].dpg_sram_gpu_addr, &adev->vcn.inst[i].dpg_sram_cpu_addr);
> + AMDGPU_GEM_DOMAIN_VRAM |
> + AMDGPU_GEM_DOMAIN_GTT,
> + &adev->vcn.inst[i].dpg_sram_bo,
> + &adev->vcn.inst[i].dpg_sram_gpu_addr,
> + &adev->vcn.inst[i].dpg_sram_cpu_addr);
> if (r) {
> dev_err(adev->dev, "VCN %d (%d) failed to allocate DPG bo\n", i, r);
> return r;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 5349ca4d19e38b..36bd6e5c52ec01 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -1948,7 +1948,8 @@ static int gfx_v9_0_mec_init(struct amdgpu_device *adev)
> mec_hpd_size = adev->gfx.num_compute_rings * GFX9_MEC_HPD_SIZE;
> if (mec_hpd_size) {
> r = amdgpu_bo_create_reserved(adev, mec_hpd_size, PAGE_SIZE,
> - AMDGPU_GEM_DOMAIN_VRAM,
> + AMDGPU_GEM_DOMAIN_VRAM |
> + AMDGPU_GEM_DOMAIN_GTT,
> &adev->gfx.mec.hpd_eop_obj,
> &adev->gfx.mec.hpd_eop_gpu_addr,
> (void **)&hpd);
> diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
> index ed2293686f0de3..48ca4a501d40fb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
> @@ -140,7 +140,8 @@ static int psp_v10_0_ring_init(struct psp_context *psp,
> /* allocate 4k Page of Local Frame Buffer memory for ring */
> ring->ring_size = 0x1000;
> ret = amdgpu_bo_create_kernel(adev, ring->ring_size, PAGE_SIZE,
> - AMDGPU_GEM_DOMAIN_VRAM,
> + AMDGPU_GEM_DOMAIN_VRAM |
> + AMDGPU_GEM_DOMAIN_GTT,
> &adev->firmware.rbuf,
> &ring->ring_mem_mc_addr,
> (void **)&ring->ring_mem);
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/smu10_smumgr.c b/drivers/gpu/drm/amd/pm/powerplay/smumgr/smu10_smumgr.c
> index 88a5641465dcf5..7eeab84d421ac3 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/smu10_smumgr.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/smu10_smumgr.c
> @@ -250,9 +250,8 @@ static int smu10_smu_init(struct pp_hwmgr *hwmgr)
>
> /* allocate space for watermarks table */
> r = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
> - sizeof(Watermarks_t),
> - PAGE_SIZE,
> - AMDGPU_GEM_DOMAIN_VRAM,
> + sizeof(Watermarks_t), PAGE_SIZE,
> + AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT,
> &priv->smu_tables.entry[SMU10_WMTABLE].handle,
> &priv->smu_tables.entry[SMU10_WMTABLE].mc_addr,
> &priv->smu_tables.entry[SMU10_WMTABLE].table);
> @@ -266,9 +265,8 @@ static int smu10_smu_init(struct pp_hwmgr *hwmgr)
>
> /* allocate space for watermarks table */
> r = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
> - sizeof(DpmClocks_t),
> - PAGE_SIZE,
> - AMDGPU_GEM_DOMAIN_VRAM,
> + sizeof(DpmClocks_t), PAGE_SIZE,
> + AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT,
> &priv->smu_tables.entry[SMU10_CLOCKTABLE].handle,
> &priv->smu_tables.entry[SMU10_CLOCKTABLE].mc_addr,
> &priv->smu_tables.entry[SMU10_CLOCKTABLE].table);
> --
> 2.36.1.74.g277cf0bc36
>
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