[PATCH 1/2] drm/amdgpu/display: make some functions static

Harry Wentland harry.wentland at amd.com
Mon Jun 6 15:46:43 UTC 2022


On 2022-06-06 11:42, Alex Deucher wrote:
> Fixes "no previous prototype" warnings.
> 
> Reported-by: kernel test robot <lkp at intel.com>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>

Reviewed-by: Harry Wentland <harry.wentland at amd.com>

Harry

> ---
>  .../gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c  | 2 +-
>  drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c         | 8 ++++----
>  drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c         | 2 +-
>  3 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
> index 1db61029481b..ed70ae10bdb1 100644
> --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
> +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
> @@ -487,7 +487,7 @@ static void dcn32_update_clocks(struct clk_mgr *clk_mgr_base,
>  				clk_mgr_base->clks.dispclk_khz / 1000 / 7);
>  }
>  
> -void dcn32_clock_read_ss_info(struct clk_mgr_internal *clk_mgr)
> +static void dcn32_clock_read_ss_info(struct clk_mgr_internal *clk_mgr)
>  {
>  	struct dc_bios *bp = clk_mgr->base.ctx->dc_bios;
>  	int ss_info_num = bp->funcs->get_ss_entry_number(
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c
> index 8eeb3b69b5b9..0faa1abd35ba 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.c
> @@ -662,8 +662,8 @@ void dccg31_init(struct dccg *dccg)
>  	}
>  }
>  
> -void dccg31_otg_add_pixel(struct dccg *dccg,
> -		uint32_t otg_inst)
> +static void dccg31_otg_add_pixel(struct dccg *dccg,
> +				 uint32_t otg_inst)
>  {
>  	struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);
>  
> @@ -671,8 +671,8 @@ void dccg31_otg_add_pixel(struct dccg *dccg,
>  			OTG_ADD_PIXEL[otg_inst], 1);
>  }
>  
> -void dccg31_otg_drop_pixel(struct dccg *dccg,
> -		uint32_t otg_inst)
> +static void dccg31_otg_drop_pixel(struct dccg *dccg,
> +				  uint32_t otg_inst)
>  {
>  	struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);
>  
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c
> index 08232d05d894..152a76ad7957 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c
> @@ -177,7 +177,7 @@ void dccg32_set_dtbclk_dto(
>  	}
>  }
>  
> -void dccg32_set_valid_pixel_rate(
> +static void dccg32_set_valid_pixel_rate(
>  		struct dccg *dccg,
>  		int ref_dtbclk_khz,
>  		int otg_inst,



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