[PATCH 1/1] drm/amdgpu/jpeg2: Add jpeg vmid update under IB submit
Lazar, Lijo
lijo.lazar at amd.com
Wed Jun 8 08:27:53 UTC 2022
On 6/8/2022 11:06 AM, Mohammad Zafar Ziya wrote:
> Add jpeg vmid update under IB submit
>
> Signed-off-by: Mohammad Zafar Ziya <Mohammadzafar.ziya at amd.com>
> Acked-by: Christian König <christian.koenig at amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar at amd.com>
Thanks,
Lijo
> ---
> drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c | 6 +++++-
> drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.h | 1 +
> 2 files changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
> index d2722adabd1b..f3c1af5130ab 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
> @@ -535,6 +535,10 @@ void jpeg_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring,
> {
> unsigned vmid = AMDGPU_JOB_GET_VMID(job);
>
> + amdgpu_ring_write(ring, PACKETJ(mmUVD_JPEG_IH_CTRL_INTERNAL_OFFSET,
> + 0, 0, PACKETJ_TYPE0));
> + amdgpu_ring_write(ring, (vmid << JPEG_IH_CTRL__IH_VMID__SHIFT));
> +
> amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_IB_VMID_INTERNAL_OFFSET,
> 0, 0, PACKETJ_TYPE0));
> amdgpu_ring_write(ring, (vmid | (vmid << 4)));
> @@ -768,7 +772,7 @@ static const struct amdgpu_ring_funcs jpeg_v2_0_dec_ring_vm_funcs = {
> 8 + /* jpeg_v2_0_dec_ring_emit_vm_flush */
> 18 + 18 + /* jpeg_v2_0_dec_ring_emit_fence x2 vm fence */
> 8 + 16,
> - .emit_ib_size = 22, /* jpeg_v2_0_dec_ring_emit_ib */
> + .emit_ib_size = 24, /* jpeg_v2_0_dec_ring_emit_ib */
> .emit_ib = jpeg_v2_0_dec_ring_emit_ib,
> .emit_fence = jpeg_v2_0_dec_ring_emit_fence,
> .emit_vm_flush = jpeg_v2_0_dec_ring_emit_vm_flush,
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.h b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.h
> index 1a03baa59755..654e43e83e2c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.h
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.h
> @@ -41,6 +41,7 @@
> #define mmUVD_JRBC_RB_REF_DATA_INTERNAL_OFFSET 0x4084
> #define mmUVD_JRBC_STATUS_INTERNAL_OFFSET 0x4089
> #define mmUVD_JPEG_PITCH_INTERNAL_OFFSET 0x401f
> +#define mmUVD_JPEG_IH_CTRL_INTERNAL_OFFSET 0x4149
>
> #define JRBC_DEC_EXTERNAL_REG_WRITE_ADDR 0x18000
>
>
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