[PATCH v2 3/3] drm/amdgpu: Update mes_v11_api_def.h

[Felix Kuehling]

Am 2022-06-10 um 13:13 schrieb Graham Sider:
> Update MES API to support oversubscription without aggregated doorbell
> for usermode queues.
>
> Signed-off-by: Graham Sider <Graham.Sider at amd.com>

Acked-by: Felix Kuehling <Felix.Kuehling at amd.com>


> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c               | 1 +
>   drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h               | 1 +
>   drivers/gpu/drm/amd/amdgpu/mes_v11_0.c                | 3 +++
>   drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 2 ++
>   drivers/gpu/drm/amd/include/mes_v11_api_def.h         | 4 +++-
>   5 files changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> index 2e86baa32c55..3d9a81a8fa1c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> @@ -681,6 +681,7 @@ int amdgpu_mes_add_hw_queue(struct amdgpu_device *adev, int gang_id,
>   	queue_input.wptr_addr = qprops->wptr_gpu_addr;
>   	queue_input.queue_type = qprops->queue_type;
>   	queue_input.paging = qprops->paging;
> +	queue_input.oversubscription_no_aggregated_en = 0;
>   
>   	r = adev->mes.funcs->add_hw_queue(&adev->mes, &queue_input);
>   	if (r) {
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
> index aa06c8396ee0..26765a9946a9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
> @@ -207,6 +207,7 @@ struct mes_add_queue_input {
>   	uint32_t        debug_vmid;
>   	uint64_t	tba_addr;
>   	uint64_t	tma_addr;
> +	uint64_t	oversubscription_no_aggregated_en;
>   };
>   
>   struct mes_remove_queue_input {
> diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> index 2a9ef308e71c..95a1394d3943 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
> @@ -163,6 +163,8 @@ static int mes_v11_0_add_hw_queue(struct amdgpu_mes *mes,
>   	mes_add_queue_pkt.gws_size = input->gws_size;
>   	mes_add_queue_pkt.trap_handler_addr = input->tba_addr;
>   	mes_add_queue_pkt.tma_addr = input->tma_addr;
> +	mes_add_queue_pkt.oversubscription_no_aggregated_en =
> +		input->oversubscription_no_aggregated_en;
>   
>   	mes_add_queue_pkt.api_status.api_completion_fence_addr =
>   		mes->ring.fence_drv.gpu_addr;
> @@ -341,6 +343,7 @@ static int mes_v11_0_set_hw_resources(struct amdgpu_mes *mes)
>   	mes_set_hw_res_pkt.disable_reset = 1;
>   	mes_set_hw_res_pkt.disable_mes_log = 1;
>   	mes_set_hw_res_pkt.use_different_vmid_compute = 1;
> +	mes_set_hw_res_pkt.oversubscription_timer = 50;
>   
>   	mes_set_hw_res_pkt.api_status.api_completion_fence_addr =
>   		mes->ring.fence_drv.gpu_addr;
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> index d8de2fbdfc7d..762bc6059387 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> @@ -235,6 +235,8 @@ static int add_queue_mes(struct device_queue_manager *dqm, struct queue *q,
>   	} else
>   		queue_input.wptr_addr = (uint64_t)q->properties.write_ptr;
>   
> +	queue_input.oversubscription_no_aggregated_en = 1;
> +
>   	queue_input.paging = false;
>   	queue_input.tba_addr = qpd->tba_addr;
>   	queue_input.tma_addr = qpd->tma_addr;
> diff --git a/drivers/gpu/drm/amd/include/mes_v11_api_def.h b/drivers/gpu/drm/amd/include/mes_v11_api_def.h
> index f9d02d7bdf77..95f0246eb045 100644
> --- a/drivers/gpu/drm/amd/include/mes_v11_api_def.h
> +++ b/drivers/gpu/drm/amd/include/mes_v11_api_def.h
> @@ -226,6 +226,7 @@ union MESAPI_SET_HW_RESOURCES {
>   			};
>   			uint32_t	uint32_t_all;
>   		};
> +		uint32_t	oversubscription_timer;
>   	};
>   
>   	uint32_t	max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
> @@ -265,7 +266,8 @@ union MESAPI__ADD_QUEUE {
>   			uint32_t is_gang_suspended	: 1;
>   			uint32_t is_tmz_queue		: 1;
>   			uint32_t map_kiq_utility_queue  : 1;
> -			uint32_t reserved		: 23;
> +			uint32_t oversubscription_no_aggregated_en : 1;
> +			uint32_t reserved		: 22;
>   		};
>   		struct MES_API_STATUS		api_status;
>   		uint64_t                        tma_addr;