[PATCH v3 1/3] drm/amdgpu: Fetch MES scheduler/KIQ versions

[Xiao, Jack]

[AMD Official Use Only - General]

Reviewed-by: Jack Xiao <Jack.Xiao at amd.com>

Regards,
Jack
________________________________
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> on behalf of Graham Sider <Graham.Sider at amd.com>
Sent: Monday, 13 June 2022 23:19
To: amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>
Cc: Joshi, Mukul <Mukul.Joshi at amd.com>; Kuehling, Felix <Felix.Kuehling at amd.com>; Sider, Graham <Graham.Sider at amd.com>; Yang, Philip <Philip.Yang at amd.com>
Subject: [PATCH v3 1/3] drm/amdgpu: Fetch MES scheduler/KIQ versions

Store MES scheduler and MES KIQ version numbers in amdgpu_mes for GFX11.

Signed-off-by: Graham Sider <Graham.Sider at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h |  3 +++
 drivers/gpu/drm/amd/amdgpu/mes_v11_0.c  | 12 ++++++++++++
 2 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
index 92ddee5e33db..aa06c8396ee0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
@@ -64,6 +64,9 @@ struct amdgpu_mes {

         spinlock_t                      queue_id_lock;

+       uint32_t                        sched_version;
+       uint32_t                        kiq_version;
+
         uint32_t                        total_max_queue;
         uint32_t                        doorbell_id_offset;
         uint32_t                        max_doorbell_slices;
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
index e4eb87689f7f..2a9ef308e71c 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
@@ -890,6 +890,18 @@ static int mes_v11_0_queue_init(struct amdgpu_device *adev,
                 mes_v11_0_queue_init_register(ring);
         }

+       /* get MES scheduler/KIQ versions */
+       mutex_lock(&adev->srbm_mutex);
+       soc21_grbm_select(adev, 3, pipe, 0, 0);
+
+       if (pipe == AMDGPU_MES_SCHED_PIPE)
+               adev->mes.sched_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
+       else if (pipe == AMDGPU_MES_KIQ_PIPE && adev->enable_mes_kiq)
+               adev->mes.kiq_version = RREG32_SOC15(GC, 0, regCP_MES_GP3_LO);
+
+       soc21_grbm_select(adev, 0, 0, 0, 0);
+       mutex_unlock(&adev->srbm_mutex);
+
         return 0;
 }

--
2.25.1

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