[PATCH v5 01/13] mm: add zone device coherent type memory support

[Sierra Guiza, Alejandro (Alex)]

On 6/17/2022 4:40 AM, David Hildenbrand wrote:
> On 31.05.22 22:00, Alex Sierra wrote:
>> Device memory that is cache coherent from device and CPU point of view.
>> This is used on platforms that have an advanced system bus (like CAPI
>> or CXL). Any page of a process can be migrated to such memory. However,
>> no one should be allowed to pin such memory so that it can always be
>> evicted.
>>
>> Signed-off-by: Alex Sierra <alex.sierra at amd.com>
>> Acked-by: Felix Kuehling <Felix.Kuehling at amd.com>
>> Reviewed-by: Alistair Popple <apopple at nvidia.com>
>> [hch: rebased ontop of the refcount changes,
>>        removed is_dev_private_or_coherent_page]
>> Signed-off-by: Christoph Hellwig <hch at lst.de>
>> ---
>>   include/linux/memremap.h | 19 +++++++++++++++++++
>>   mm/memcontrol.c          |  7 ++++---
>>   mm/memory-failure.c      |  8 ++++++--
>>   mm/memremap.c            | 10 ++++++++++
>>   mm/migrate_device.c      | 16 +++++++---------
>>   mm/rmap.c                |  5 +++--
>>   6 files changed, 49 insertions(+), 16 deletions(-)
>>
>> diff --git a/include/linux/memremap.h b/include/linux/memremap.h
>> index 8af304f6b504..9f752ebed613 100644
>> --- a/include/linux/memremap.h
>> +++ b/include/linux/memremap.h
>> @@ -41,6 +41,13 @@ struct vmem_altmap {
>>    * A more complete discussion of unaddressable memory may be found in
>>    * include/linux/hmm.h and Documentation/vm/hmm.rst.
>>    *
>> + * MEMORY_DEVICE_COHERENT:
>> + * Device memory that is cache coherent from device and CPU point of view. This
>> + * is used on platforms that have an advanced system bus (like CAPI or CXL). A
>> + * driver can hotplug the device memory using ZONE_DEVICE and with that memory
>> + * type. Any page of a process can be migrated to such memory. However no one
> Any page might not be right, I'm pretty sure. ... just thinking about special pages
> like vdso, shared zeropage, ... pinned pages ...

Hi David,

Yes, I think you're right. This type does not cover all special pages.  
I need to correct that on the cover letter.
Pinned pages are allowed as long as they're not long term pinned.

Regards,
Alex Sierra

>
>> + * should be allowed to pin such memory so that it can always be evicted.
>> + *
>>    * MEMORY_DEVICE_FS_DAX:
>>    * Host memory that has similar access semantics as System RAM i.e. DMA
>>    * coherent and supports page pinning. In support of coordinating page
>> @@ -61,6 +68,7 @@ struct vmem_altmap {
>>   enum memory_type {
>>   	/* 0 is reserved to catch uninitialized type fields */
>>   	MEMORY_DEVICE_PRIVATE = 1,
>> +	MEMORY_DEVICE_COHERENT,
>>   	MEMORY_DEVICE_FS_DAX,
>>   	MEMORY_DEVICE_GENERIC,
>>   	MEMORY_DEVICE_PCI_P2PDMA,
>> @@ -143,6 +151,17 @@ static inline bool folio_is_device_private(const struct folio *folio)
> In general, this LGTM, and it should be correct with PageAnonExclusive I think.
>
>
> However, where exactly is pinning forbidden?

Long-term pinning is forbidden since it would interfere with the device 
memory manager owning the
device-coherent pages (e.g. evictions in TTM). However, normal pinning 
is allowed on this device type.

Regards,
Alex Sierra

>