[PATCH] amd/display/dc: Fix COLOR_ENCODING and COLOR_RANGE doing nothing for DCN20+

Alex Deucher alexdeucher at gmail.com
Tue Jun 21 13:15:43 UTC 2022


On Mon, Jun 20, 2022 at 8:46 PM VURDIGERENATARAJ, CHANDAN
<CHANDAN.VURDIGERENATARAJ at amd.com> wrote:
>
> Hi Alex,
>
> I think this was pushed earlier by Harry.
> Not sure why it did not get merged.
> https://www.spinics.net/lists/stable/msg543116.html has the history.

I guess it never landed?  I don't see it in the git history.

Alex

>
> BR,
> Chandan V N
>
> >Applied.  Thanks!
> >
> >Alex
> >
> >On Wed, Jun 15, 2022 at 9:21 PM Joshua Ashton <joshua at froggi.es> wrote:
> >>
> >> For DCN20 and above, the code that actually hooks up the provided
> >> input_color_space got lost at some point.
> >>
> >> Fixes COLOR_ENCODING and COLOR_RANGE doing nothing on DCN20+.
> >> Tested using Steam Remote Play Together + gamescope.
> >>
> >> Signed-off-by: Joshua Ashton <joshua at froggi.es>
> >> ---
> >>  drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c   | 3 +++
> >>  drivers/gpu/drm/amd/display/dc/dcn201/dcn201_dpp.c | 3 +++
> >>  drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c   | 3 +++
> >>  3 files changed, 9 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c
> >> b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c
> >> index 970b65efeac1..eaa7032f0f1a 100644
> >> --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c
> >> +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp.c
> >> @@ -212,6 +212,9 @@ static void dpp2_cnv_setup (
> >>                 break;
> >>         }
> >>
> >> +       /* Set default color space based on format if none is given. */
> >> +       color_space = input_color_space ? input_color_space :
> >> + color_space;
> >> +
> >>         if (is_2bit == 1 && alpha_2bit_lut != NULL) {
> >>                 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT0, alpha_2bit_lut->lut0);
> >>                 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT1,
> >> alpha_2bit_lut->lut1); diff --git
> >> a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_dpp.c
> >> b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_dpp.c
> >> index 8b6505b7dca8..f50ab961bc17 100644
> >> --- a/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_dpp.c
> >> +++ b/drivers/gpu/drm/amd/display/dc/dcn201/dcn201_dpp.c
> >> @@ -153,6 +153,9 @@ static void dpp201_cnv_setup(
> >>                 break;
> >>         }
> >>
> >> +       /* Set default color space based on format if none is given. */
> >> +       color_space = input_color_space ? input_color_space :
> >> + color_space;
> >> +
> >>         if (is_2bit == 1 && alpha_2bit_lut != NULL) {
> >>                 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT0, alpha_2bit_lut->lut0);
> >>                 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT1,
> >> alpha_2bit_lut->lut1); diff --git
> >> a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c
> >> b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c
> >> index 9cca59bf2ae0..3c77949b8110 100644
> >> --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c
> >> +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c
> >> @@ -294,6 +294,9 @@ void dpp3_cnv_setup (
> >>                 break;
> >>         }
> >>
> >> +       /* Set default color space based on format if none is given. */
> >> +       color_space = input_color_space ? input_color_space :
> >> + color_space;
> >> +
> >>         if (is_2bit == 1 && alpha_2bit_lut != NULL) {
> >>                 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT0, alpha_2bit_lut->lut0);
> >>                 REG_UPDATE(ALPHA_2BIT_LUT, ALPHA_2BIT_LUT1,
> >> alpha_2bit_lut->lut1);
> >> --
> >> 2.36.1
> >>


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