[PATCH 19/40] drm/amd/display: Don't set dram clock change requirement for SubVP
Rodrigo Siqueira
Rodrigo.Siqueira at amd.com
Thu Jun 30 19:13:01 UTC 2022
From: Alvin Lee <Alvin.Lee2 at amd.com>
[Description]
In general cases we want to keep the dram clock change requirement (we
prefer configs that support MCLK switch). Only override to false for
SubVP.
Reviewed-by: Jun Lei <Jun.Lei at amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira at amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2 at amd.com>
---
drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h | 1 +
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
index b5d7e251ed81..87c9b9f9976e 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
@@ -184,6 +184,7 @@ struct _vcs_dpi_soc_bounding_box_st {
double max_avg_fabric_bw_use_normal_percent;
double max_avg_dram_bw_use_normal_strobe_percent;
enum dm_prefetch_modes allow_for_pstate_or_stutter_in_vblank_final;
+ bool dram_clock_change_requirement_final;
double writeback_latency_us;
double ideal_dram_bw_after_urgent_percent;
double pct_ideal_dram_sdp_bw_after_urgent_pixel_only; // PercentOfIdealDRAMFabricAndSDPPortBWReceivedAfterUrgLatencyPixelDataOnly
diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
index 5185c2ccdfd5..95edca4c085b 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
@@ -343,7 +343,7 @@ static void fetch_socbb_params(struct display_mode_lib *mode_lib)
mode_lib->vba.MaxAveragePercentOfIdealDRAMBWDisplayCanUseInNormalSystemOperationSTROBE =
soc->max_avg_dram_bw_use_normal_strobe_percent;
- mode_lib->vba.DRAMClockChangeRequirementFinal = 1;
+ mode_lib->vba.DRAMClockChangeRequirementFinal = soc->dram_clock_change_requirement_final;
mode_lib->vba.FCLKChangeRequirementFinal = 1;
mode_lib->vba.USRRetrainingRequiredFinal = 1;
mode_lib->vba.ConfigurableDETSizeEnFinal = 0;
--
2.25.1
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