[PATCH] drm/amdgpu: only allow secure submission on rings which support that
Christian König
christian.koenig at amd.com
Tue Mar 15 07:20:13 UTC 2022
Am 15.03.22 um 06:45 schrieb Lang Yu:
> Only GFX ring, SDMA ring and VCN decode ring support secure submission
> at the moment.
>
> Suggested-by: Christian König <christian.koenig at amd.com>
> Signed-off-by: Lang Yu <Lang.Yu at amd.com>
Good work, patch is Reviewed-by: Christian König <christian.koenig at amd.com>.
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 1 +
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 +
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 +
> drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 1 +
> drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 1 +
> drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 4 ++++
> drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 1 +
> drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 1 +
> drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 1 +
> drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 1 +
> drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 2 ++
> drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 2 ++
> 13 files changed, 19 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> index bc1297dcdf97..d583766ea392 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
> @@ -166,8 +166,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
> }
>
> if ((ib->flags & AMDGPU_IB_FLAGS_SECURE) &&
> - (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE)) {
> - dev_err(adev->dev, "secure submissions not supported on compute rings\n");
> + (!ring->funcs->secure_submission_supported)) {
> + dev_err(adev->dev, "secure submissions not supported on ring <%s>\n", ring->name);
> return -EINVAL;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> index a8bed1b47899..5320bb0883d8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> @@ -155,6 +155,7 @@ struct amdgpu_ring_funcs {
> u32 nop;
> bool support_64bit_ptrs;
> bool no_user_fence;
> + bool secure_submission_supported;
> unsigned vmhub;
> unsigned extra_dw;
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index 713d39d89e30..f4c6accd3226 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -9377,6 +9377,7 @@ static const struct amdgpu_ring_funcs gfx_v10_0_ring_funcs_gfx = {
> .align_mask = 0xff,
> .nop = PACKET3(PACKET3_NOP, 0x3FFF),
> .support_64bit_ptrs = true,
> + .secure_submission_supported = true,
> .vmhub = AMDGPU_GFXHUB_0,
> .get_rptr = gfx_v10_0_ring_get_rptr_gfx,
> .get_wptr = gfx_v10_0_ring_get_wptr_gfx,
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 8def7f630d4c..46d4bf27ebbb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -6865,6 +6865,7 @@ static const struct amdgpu_ring_funcs gfx_v9_0_ring_funcs_gfx = {
> .align_mask = 0xff,
> .nop = PACKET3(PACKET3_NOP, 0x3FFF),
> .support_64bit_ptrs = true,
> + .secure_submission_supported = true,
> .vmhub = AMDGPU_GFXHUB_0,
> .get_rptr = gfx_v9_0_ring_get_rptr_gfx,
> .get_wptr = gfx_v9_0_ring_get_wptr_gfx,
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
> index 4509bd4cce2d..1d8bbcbd7a37 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
> @@ -1142,6 +1142,7 @@ static const struct amdgpu_ring_funcs sdma_v2_4_ring_funcs = {
> .align_mask = 0xf,
> .nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP),
> .support_64bit_ptrs = false,
> + .secure_submission_supported = true,
> .get_rptr = sdma_v2_4_ring_get_rptr,
> .get_wptr = sdma_v2_4_ring_get_wptr,
> .set_wptr = sdma_v2_4_ring_set_wptr,
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> index 135727b59c41..4ef4feff5649 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> @@ -1580,6 +1580,7 @@ static const struct amdgpu_ring_funcs sdma_v3_0_ring_funcs = {
> .align_mask = 0xf,
> .nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP),
> .support_64bit_ptrs = false,
> + .secure_submission_supported = true,
> .get_rptr = sdma_v3_0_ring_get_rptr,
> .get_wptr = sdma_v3_0_ring_get_wptr,
> .set_wptr = sdma_v3_0_ring_set_wptr,
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> index 01b385568c14..d7e8f7232364 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> @@ -2414,6 +2414,7 @@ static const struct amdgpu_ring_funcs sdma_v4_0_ring_funcs = {
> .align_mask = 0xf,
> .nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP),
> .support_64bit_ptrs = true,
> + .secure_submission_supported = true,
> .vmhub = AMDGPU_MMHUB_0,
> .get_rptr = sdma_v4_0_ring_get_rptr,
> .get_wptr = sdma_v4_0_ring_get_wptr,
> @@ -2450,6 +2451,7 @@ static const struct amdgpu_ring_funcs sdma_v4_0_ring_funcs_2nd_mmhub = {
> .align_mask = 0xf,
> .nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP),
> .support_64bit_ptrs = true,
> + .secure_submission_supported = true,
> .vmhub = AMDGPU_MMHUB_1,
> .get_rptr = sdma_v4_0_ring_get_rptr,
> .get_wptr = sdma_v4_0_ring_get_wptr,
> @@ -2482,6 +2484,7 @@ static const struct amdgpu_ring_funcs sdma_v4_0_page_ring_funcs = {
> .align_mask = 0xf,
> .nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP),
> .support_64bit_ptrs = true,
> + .secure_submission_supported = true,
> .vmhub = AMDGPU_MMHUB_0,
> .get_rptr = sdma_v4_0_ring_get_rptr,
> .get_wptr = sdma_v4_0_page_ring_get_wptr,
> @@ -2514,6 +2517,7 @@ static const struct amdgpu_ring_funcs sdma_v4_0_page_ring_funcs_2nd_mmhub = {
> .align_mask = 0xf,
> .nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP),
> .support_64bit_ptrs = true,
> + .secure_submission_supported = true,
> .vmhub = AMDGPU_MMHUB_1,
> .get_rptr = sdma_v4_0_ring_get_rptr,
> .get_wptr = sdma_v4_0_page_ring_get_wptr,
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
> index 53a8df4b030e..a8d49c005f73 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
> @@ -1690,6 +1690,7 @@ static const struct amdgpu_ring_funcs sdma_v5_0_ring_funcs = {
> .align_mask = 0xf,
> .nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP),
> .support_64bit_ptrs = true,
> + .secure_submission_supported = true,
> .vmhub = AMDGPU_GFXHUB_0,
> .get_rptr = sdma_v5_0_ring_get_rptr,
> .get_wptr = sdma_v5_0_ring_get_wptr,
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
> index dcc622e18d45..824eace69884 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
> @@ -1687,6 +1687,7 @@ static const struct amdgpu_ring_funcs sdma_v5_2_ring_funcs = {
> .align_mask = 0xf,
> .nop = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP),
> .support_64bit_ptrs = true,
> + .secure_submission_supported = true,
> .vmhub = AMDGPU_GFXHUB_0,
> .get_rptr = sdma_v5_2_ring_get_rptr,
> .get_wptr = sdma_v5_2_ring_get_wptr,
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> index 7bbb9ba6b80b..6c9d5cde61c4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
> @@ -1910,6 +1910,7 @@ static const struct amdgpu_ring_funcs vcn_v1_0_dec_ring_vm_funcs = {
> .align_mask = 0xf,
> .support_64bit_ptrs = false,
> .no_user_fence = true,
> + .secure_submission_supported = true,
> .vmhub = AMDGPU_MMHUB_0,
> .get_rptr = vcn_v1_0_dec_ring_get_rptr,
> .get_wptr = vcn_v1_0_dec_ring_get_wptr,
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> index 319ac8ea434b..8cb2124405f6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> @@ -2007,6 +2007,7 @@ static const struct amd_ip_funcs vcn_v2_0_ip_funcs = {
> static const struct amdgpu_ring_funcs vcn_v2_0_dec_ring_vm_funcs = {
> .type = AMDGPU_RING_TYPE_VCN_DEC,
> .align_mask = 0xf,
> + .secure_submission_supported = true,
> .vmhub = AMDGPU_MMHUB_0,
> .get_rptr = vcn_v2_0_dec_ring_get_rptr,
> .get_wptr = vcn_v2_0_dec_ring_get_wptr,
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> index 1869bae4104b..1bf672966a62 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> @@ -1515,6 +1515,7 @@ static void vcn_v2_5_dec_ring_set_wptr(struct amdgpu_ring *ring)
> static const struct amdgpu_ring_funcs vcn_v2_5_dec_ring_vm_funcs = {
> .type = AMDGPU_RING_TYPE_VCN_DEC,
> .align_mask = 0xf,
> + .secure_submission_supported = true,
> .vmhub = AMDGPU_MMHUB_1,
> .get_rptr = vcn_v2_5_dec_ring_get_rptr,
> .get_wptr = vcn_v2_5_dec_ring_get_wptr,
> @@ -1545,6 +1546,7 @@ static const struct amdgpu_ring_funcs vcn_v2_5_dec_ring_vm_funcs = {
> static const struct amdgpu_ring_funcs vcn_v2_6_dec_ring_vm_funcs = {
> .type = AMDGPU_RING_TYPE_VCN_DEC,
> .align_mask = 0xf,
> + .secure_submission_supported = true,
> .vmhub = AMDGPU_MMHUB_0,
> .get_rptr = vcn_v2_5_dec_ring_get_rptr,
> .get_wptr = vcn_v2_5_dec_ring_get_wptr,
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> index 5dbf5ba7d62d..c87263ed20ec 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> @@ -1786,6 +1786,7 @@ static const struct amdgpu_ring_funcs vcn_v3_0_dec_sw_ring_vm_funcs = {
> .type = AMDGPU_RING_TYPE_VCN_DEC,
> .align_mask = 0x3f,
> .nop = VCN_DEC_SW_CMD_NO_OP,
> + .secure_submission_supported = true,
> .vmhub = AMDGPU_MMHUB_0,
> .get_rptr = vcn_v3_0_dec_ring_get_rptr,
> .get_wptr = vcn_v3_0_dec_ring_get_wptr,
> @@ -1944,6 +1945,7 @@ static int vcn_v3_0_ring_patch_cs_in_place(struct amdgpu_cs_parser *p,
> static const struct amdgpu_ring_funcs vcn_v3_0_dec_ring_vm_funcs = {
> .type = AMDGPU_RING_TYPE_VCN_DEC,
> .align_mask = 0xf,
> + .secure_submission_supported = true,
> .vmhub = AMDGPU_MMHUB_0,
> .get_rptr = vcn_v3_0_dec_ring_get_rptr,
> .get_wptr = vcn_v3_0_dec_ring_get_wptr,
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