[PATCH 04/13] drm/amd/display: FEC check in timing validation

[Alex Hung]

From: Chiawen Huang <chiawen.huang at amd.com>

[Why]
disable/enable leads fec mismatch between hw/sw fec state.

[How]
check fec status to fastboot on/off.

Reviewed-by: Anthony Koo <Anthony.Koo at amd.com>
Acked-by: Alex Hung <alex.hung at amd.com>
Signed-off-by: Chiawen Huang <chiawen.huang at amd.com>
---
 drivers/gpu/drm/amd/display/dc/core/dc.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index f6e19efea756..75f9c97bebb0 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1496,6 +1496,10 @@ bool dc_validate_boot_timing(const struct dc *dc,
 	if (!link->link_enc->funcs->is_dig_enabled(link->link_enc))
 		return false;
 
+	/* Check for FEC status*/
+	if (link->link_enc->funcs->fec_is_active(link->link_enc))
+		return false;
+
 	enc_inst = link->link_enc->funcs->get_dig_frontend(link->link_enc);
 
 	if (enc_inst == ENGINE_ID_UNKNOWN)
-- 
2.35.1