[PATCH] drm/amdgpu/vcn3: send smu interface type
Zhang, Boyuan
Boyuan.Zhang at amd.com
Thu Mar 24 17:25:27 UTC 2022
[AMD Official Use Only]
Hi Paul,
This change is to differentiate device (IP_VERSION(3, 1, 2)) and device (IP_VERSION(3, 1, 1)), since they are using different mailbox registers for VCN DPM. There is no other impact for VCN.
And thank for pointing out the format issue. I just sent out V2. Please have a look.
Regards,
Boyuan
-----Original Message-----
From: Paul Menzel <pmenzel at molgen.mpg.de>
Sent: March 24, 2022 1:56 AM
To: Zhang, Yifan <Yifan1.Zhang at amd.com>; Zhang, Boyuan <Boyuan.Zhang at amd.com>
Cc: amd-gfx at lists.freedesktop.org; Deucher, Alexander <Alexander.Deucher at amd.com>; Huang, Ray <Ray.Huang at amd.com>
Subject: Re: [PATCH] drm/amdgpu/vcn3: send smu interface type
Dear Yifan, dear Boyuan,
Am 24.03.22 um 03:59 schrieb Yifan Zhang:
> From: Boyuan Zhang <boyuan.zhang at amd.com>
>
> For VCN FW to detect ASIC type
What affect does this have? How does VCN FW behave different now?
> Signed-off-by: Boyuan Zhang <boyuan.zhang at amd.com>
> Signed-off-by: Yifan Zhang <yifan1.zhang at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 7 +++++++
> drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 7 +++++++
> 2 files changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> index e2fde88aaf5e..f06fb7f882e2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> @@ -159,6 +159,7 @@
> #define AMDGPU_VCN_MULTI_QUEUE_FLAG (1 << 8)
> #define AMDGPU_VCN_SW_RING_FLAG (1 << 9)
> #define AMDGPU_VCN_FW_LOGGING_FLAG (1 << 10)
> +#define AMDGPU_VCN_SMU_VERSION_INFO_FLAG (1 << 11)
>
> #define AMDGPU_VCN_IB_FLAG_DECODE_BUFFER 0x00000001
> #define AMDGPU_VCN_CMD_FLAG_MSG_BUFFER 0x00000001
> @@ -279,6 +280,11 @@ struct amdgpu_fw_shared_fw_logging {
> uint32_t size;
> };
>
> +struct amdgpu_fw_shared_smu_interface_info {
> + uint8_t smu_interface_type;
> + uint8_t padding[3];
> +};
> +
> struct amdgpu_fw_shared {
> uint32_t present_flag_0;
> uint8_t pad[44];
> @@ -287,6 +293,7 @@ struct amdgpu_fw_shared {
> struct amdgpu_fw_shared_multi_queue multi_queue;
> struct amdgpu_fw_shared_sw_ring sw_ring;
> struct amdgpu_fw_shared_fw_logging fw_log;
> + struct amdgpu_fw_shared_smu_interface_info smu_interface_info;
> };
>
> struct amdgpu_vcn_fwlog {
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> index b16c56aa2d22..c5bf7cbfa82c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> @@ -219,6 +219,13 @@ static int vcn_v3_0_sw_init(void *handle)
> cpu_to_le32(AMDGPU_VCN_MULTI_QUEUE_FLAG) |
> cpu_to_le32(AMDGPU_VCN_FW_SHARED_FLAG_0_RB);
> fw_shared->sw_ring.is_enabled = cpu_to_le32(DEC_SW_RING_ENABLED);
> + if (adev->ip_versions[UVD_HWIP][0] == IP_VERSION(3, 1, 2)) {
> + fw_shared->present_flag_0 |= AMDGPU_VCN_SMU_VERSION_INFO_FLAG;
> + fw_shared->smu_interface_info.smu_interface_type = 2;
> + } else if(adev->ip_versions[UVD_HWIP][0] == IP_VERSION(3, 1, 1)) {
Please add a space before the (, which `checkpatch.pl` also would have
found:
$ scripts/checkpatch.pl
/dev/shm/0001-drm-amdgpu-vcn3-send-smu-interface-type.patch
ERROR: space required before the open parenthesis '('
#58: FILE: drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c:225:
+ } else if(adev->ip_versions[UVD_HWIP][0] ==
IP_VERSION(3, 1, 1)) {
Also why not order it smallest version first? Will there ever be other
IP versions for VCN 3.0?
> + fw_shared->present_flag_0 |= AMDGPU_VCN_SMU_VERSION_INFO_FLAG;
> + fw_shared->smu_interface_info.smu_interface_type = 1;
> + }
>
> if (amdgpu_vcnfw_log)
> amdgpu_vcn_fwlog_init(&adev->vcn.inst[i]);
Kind regards,
Paul
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