[PATCH] drm/amdgpu/gfx11: remove some register fields that no longer exist

[Christian König]

Am 05.05.22 um 05:19 schrieb Alex Deucher:
> Some copy paste leftovers for older asics.  They were protected
> by __BIG_ENDIAN, so we didn't notice them initially.
>
> Reported-by: kernel test robot <lkp at intel.com>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>

Reviewed-by: Christian König <christian.koenig at amd.com>

I'm wondering if that is are actually working on older asics, most 
likely not.

> ---
>   drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 6 ------
>   1 file changed, 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> index f0f13eeb4b71..7c75fe51ec20 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> @@ -3452,9 +3452,6 @@ static int gfx_v11_0_cp_gfx_resume(struct amdgpu_device *adev)
>   	rb_bufsz = order_base_2(ring->ring_size / 8);
>   	tmp = REG_SET_FIELD(0, CP_RB0_CNTL, RB_BUFSZ, rb_bufsz);
>   	tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, RB_BLKSZ, rb_bufsz - 2);
> -#ifdef __BIG_ENDIAN
> -	tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, BUF_SWAP, 1);
> -#endif
>   	WREG32_SOC15(GC, 0, regCP_RB0_CNTL, tmp);
>   
>   	/* Initialize the ring buffer's write pointers */
> @@ -4102,9 +4099,6 @@ static int gfx_v11_0_compute_mqd_init(struct amdgpu_device *adev, void *m,
>   			    (order_base_2(prop->queue_size / 4) - 1));
>   	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, RPTR_BLOCK_SIZE,
>   			    ((order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1) << 8));
> -#ifdef __BIG_ENDIAN
> -	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, ENDIAN_SWAP, 1);
> -#endif
>   	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, UNORD_DISPATCH, 0);
>   	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TUNNEL_DISPATCH, 0);
>   	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);