[PATCH v2 18/19] drm/amd/display: expose AMD source specific DPCD for FreeSync PSR support

[David Zhang]

[why & how]
The source specific DPCD exposure which is to set the sink device PSR
active vtotal control mode.

Signed-off-by: David Zhang <dingchen.zhang at amd.com>
---
 drivers/gpu/drm/amd/display/include/ddc_service_types.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/display/include/ddc_service_types.h b/drivers/gpu/drm/amd/display/include/ddc_service_types.h
index 73b9e0a87e54..054253286886 100644
--- a/drivers/gpu/drm/amd/display/include/ddc_service_types.h
+++ b/drivers/gpu/drm/amd/display/include/ddc_service_types.h
@@ -40,6 +40,7 @@
 
 #define DP_DEVICE_ID_38EC11 0x38EC11
 #define DP_FORCE_PSRSU_CAPABILITY 0x40F
+#define DP_SINK_PSR_ACTIVE_VTOTAL_CONTROL_MODE 0x375
 
 enum ddc_result {
 	DDC_RESULT_UNKNOWN = 0,
-- 
2.25.1