[bug report] drm/radeon: add dpm support for CI dGPUs (v2)

[Dan Carpenter]

[ Ancient code.  No idea why it's only being reported as a bug now.  -dan ]

Hello Alex Deucher,

The patch cc8dbbb4f62a: "drm/radeon: add dpm support for CI dGPUs
(v2)" from Aug 14, 2013, leads to the following Smatch static checker
warning:

drivers/gpu/drm/radeon/ci_dpm.c:5695 ci_dpm_init() warn: 'rdev->pm.dpm.dyn_state.cac_leakage_table.entries' double freed
drivers/gpu/drm/radeon/ci_dpm.c:5695 ci_dpm_init() warn: 'rdev->pm.dpm.dyn_state.cac_tdp_table' double freed
drivers/gpu/drm/radeon/ci_dpm.c:5695 ci_dpm_init() warn: 'rdev->pm.dpm.dyn_state.ppm_table' double freed

drivers/gpu/drm/radeon/ci_dpm.c
    5637 int ci_dpm_init(struct radeon_device *rdev)
    5638 {
    5639         int index = GetIndexIntoMasterTable(DATA, ASIC_InternalSS_Info);
    5640         SMU7_Discrete_DpmTable  *dpm_table;
    5641         struct radeon_gpio_rec gpio;
    5642         u16 data_offset, size;
    5643         u8 frev, crev;
    5644         struct ci_power_info *pi;
    5645         enum pci_bus_speed speed_cap = PCI_SPEED_UNKNOWN;
    5646         struct pci_dev *root = rdev->pdev->bus->self;
    5647         int ret;
    5648 
    5649         pi = kzalloc(sizeof(struct ci_power_info), GFP_KERNEL);
    5650         if (pi == NULL)
    5651                 return -ENOMEM;
    5652         rdev->pm.dpm.priv = pi;
    5653 
    5654         if (!pci_is_root_bus(rdev->pdev->bus))
    5655                 speed_cap = pcie_get_speed_cap(root);
    5656         if (speed_cap == PCI_SPEED_UNKNOWN) {
    5657                 pi->sys_pcie_mask = 0;
    5658         } else {
    5659                 if (speed_cap == PCIE_SPEED_8_0GT)
    5660                         pi->sys_pcie_mask = RADEON_PCIE_SPEED_25 |
    5661                                 RADEON_PCIE_SPEED_50 |
    5662                                 RADEON_PCIE_SPEED_80;
    5663                 else if (speed_cap == PCIE_SPEED_5_0GT)
    5664                         pi->sys_pcie_mask = RADEON_PCIE_SPEED_25 |
    5665                                 RADEON_PCIE_SPEED_50;
    5666                 else
    5667                         pi->sys_pcie_mask = RADEON_PCIE_SPEED_25;
    5668         }
    5669         pi->force_pcie_gen = RADEON_PCIE_GEN_INVALID;
    5670 
    5671         pi->pcie_gen_performance.max = RADEON_PCIE_GEN1;
    5672         pi->pcie_gen_performance.min = RADEON_PCIE_GEN3;
    5673         pi->pcie_gen_powersaving.max = RADEON_PCIE_GEN1;
    5674         pi->pcie_gen_powersaving.min = RADEON_PCIE_GEN3;
    5675 
    5676         pi->pcie_lane_performance.max = 0;
    5677         pi->pcie_lane_performance.min = 16;
    5678         pi->pcie_lane_powersaving.max = 0;
    5679         pi->pcie_lane_powersaving.min = 16;
    5680 
    5681         ret = ci_get_vbios_boot_values(rdev, &pi->vbios_boot_state);
    5682         if (ret) {
    5683                 ci_dpm_fini(rdev);
    5684                 return ret;
    5685         }
    5686 
    5687         ret = r600_get_platform_caps(rdev);
    5688         if (ret) {
    5689                 ci_dpm_fini(rdev);
    5690                 return ret;
    5691         }
    5692 
    5693         ret = r600_parse_extended_power_table(rdev);
    5694         if (ret) {i
--> 5695                 ci_dpm_fini(rdev);

rdev->pm.dpm.dyn_state.cac_leakage_table.entries is freed
on error inside r600_parse_extended_power_table() and again inside
ci_dpm_fini().

    5696                 return ret;
    5697         }
    5698 
    5699         ret = ci_parse_power_table(rdev);
    5700         if (ret) {
    5701                 ci_dpm_fini(rdev);

regards,
dan carpenter