[PATCH] drm/amdgpu/soc21: add mode2 asic reset for SMU IP v13.0.4

Alex Deucher alexdeucher at gmail.com
Tue May 31 21:14:52 UTC 2022


Ping?

On Thu, May 26, 2022 at 1:58 PM Alex Deucher <alexander.deucher at amd.com> wrote:
>
> Set the default reset method to mode2 for SMU IP v13.0.4
>
> Signed-off-by: Tim Huang <tim.huang at amd.com>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/soc21.c | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c b/drivers/gpu/drm/amd/amdgpu/soc21.c
> index 9e18a2b22607..a400f5273343 100644
> --- a/drivers/gpu/drm/amd/amdgpu/soc21.c
> +++ b/drivers/gpu/drm/amd/amdgpu/soc21.c
> @@ -310,6 +310,7 @@ static enum amd_reset_method
>  soc21_asic_reset_method(struct amdgpu_device *adev)
>  {
>         if (amdgpu_reset_method == AMD_RESET_METHOD_MODE1 ||
> +           amdgpu_reset_method == AMD_RESET_METHOD_MODE2 ||
>             amdgpu_reset_method == AMD_RESET_METHOD_BACO)
>                 return amdgpu_reset_method;
>
> @@ -320,6 +321,8 @@ soc21_asic_reset_method(struct amdgpu_device *adev)
>         switch (adev->ip_versions[MP1_HWIP][0]) {
>         case IP_VERSION(13, 0, 0):
>                 return AMD_RESET_METHOD_MODE1;
> +       case IP_VERSION(13, 0, 4):
> +               return AMD_RESET_METHOD_MODE2;
>         default:
>                 if (amdgpu_dpm_is_baco_supported(adev))
>                         return AMD_RESET_METHOD_BACO;
> @@ -341,6 +344,10 @@ static int soc21_asic_reset(struct amdgpu_device *adev)
>                 dev_info(adev->dev, "BACO reset\n");
>                 ret = amdgpu_dpm_baco_reset(adev);
>                 break;
> +       case AMD_RESET_METHOD_MODE2:
> +               dev_info(adev->dev, "MODE2 reset\n");
> +               ret = amdgpu_dpm_mode2_reset(adev);
> +               break;
>         default:
>                 dev_info(adev->dev, "MODE1 reset\n");
>                 ret = amdgpu_device_mode1_reset(adev);
> --
> 2.35.3
>


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