[PATCH] drm/amdgpu/psp: don't free PSP buffers on suspend

[Alex Deucher]

We can reuse the same buffers on resume.

Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 56 +++++++++++++------------
 1 file changed, 29 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 0a8c30475dda..d9cb4c4b8289 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -172,6 +172,7 @@ void psp_ta_free_shared_buf(struct ta_mem_context *mem_ctx)
 {
 	amdgpu_bo_free_kernel(&mem_ctx->shared_bo, &mem_ctx->shared_mc_addr,
 			      &mem_ctx->shared_buf);
+	mem_ctx->shared_bo = NULL;
 }
 
 static void psp_free_shared_bufs(struct psp_context *psp)
@@ -182,6 +183,7 @@ static void psp_free_shared_bufs(struct psp_context *psp)
 	/* free TMR memory buffer */
 	pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
 	amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, pptr);
+	psp->tmr_bo = NULL;
 
 	/* free xgmi shared memory */
 	psp_ta_free_shared_buf(&psp->xgmi_context.context.mem_context);
@@ -743,37 +745,39 @@ static int psp_load_toc(struct psp_context *psp,
 /* Set up Trusted Memory Region */
 static int psp_tmr_init(struct psp_context *psp)
 {
-	int ret;
+	int ret = 0;
 	int tmr_size;
 	void *tmr_buf;
 	void **pptr;
 
-	/*
-	 * According to HW engineer, they prefer the TMR address be "naturally
-	 * aligned" , e.g. the start address be an integer divide of TMR size.
-	 *
-	 * Note: this memory need be reserved till the driver
-	 * uninitializes.
-	 */
-	tmr_size = PSP_TMR_SIZE(psp->adev);
-
-	/* For ASICs support RLC autoload, psp will parse the toc
-	 * and calculate the total size of TMR needed */
-	if (!amdgpu_sriov_vf(psp->adev) &&
-	    psp->toc.start_addr &&
-	    psp->toc.size_bytes &&
-	    psp->fw_pri_buf) {
-		ret = psp_load_toc(psp, &tmr_size);
-		if (ret) {
-			DRM_ERROR("Failed to load toc\n");
-			return ret;
+	if (!psp->tmr_bo) {
+		/*
+		 * According to HW engineer, they prefer the TMR address be "naturally
+		 * aligned" , e.g. the start address be an integer divide of TMR size.
+		 *
+		 * Note: this memory need be reserved till the driver
+		 * uninitializes.
+		 */
+		tmr_size = PSP_TMR_SIZE(psp->adev);
+
+		/* For ASICs support RLC autoload, psp will parse the toc
+		 * and calculate the total size of TMR needed */
+		if (!amdgpu_sriov_vf(psp->adev) &&
+		    psp->toc.start_addr &&
+		    psp->toc.size_bytes &&
+		    psp->fw_pri_buf) {
+			ret = psp_load_toc(psp, &tmr_size);
+			if (ret) {
+				DRM_ERROR("Failed to load toc\n");
+				return ret;
+			}
 		}
-	}
 
-	pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
-	ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_ALIGNMENT,
-				      AMDGPU_GEM_DOMAIN_VRAM,
-				      &psp->tmr_bo, &psp->tmr_mc_addr, pptr);
+		pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
+		ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_ALIGNMENT,
+					      AMDGPU_GEM_DOMAIN_VRAM,
+					      &psp->tmr_bo, &psp->tmr_mc_addr, pptr);
+	}
 
 	return ret;
 }
@@ -2701,8 +2705,6 @@ static int psp_suspend(void *handle)
 	}
 
 out:
-	psp_free_shared_bufs(psp);
-
 	return ret;
 }
 
-- 
2.38.1