[PATCH] drm/amdgpu: Add nv mailbox irq in soc21

[Zhang, Hawking]

[AMD Official Use Only - General]

I assume the offset, as well as field, of MAILBOX_INT_CNTL register, and the mailbox irq source in soc21 adapters kept the same as the ones in navi1x.

With that confirmed, the change is

Reviewed-by: Hawking Zhang <Hawking.Zhang at amd.com>

Regards,
Hawking

-----Original Message-----
From: YuBiao Wang <YuBiao.Wang at amd.com>
Sent: Wednesday, November 30, 2022 17:35
To: amd-gfx at lists.freedesktop.org
Cc: Andrey Grodzovsky <Andrey.Grodzovsky at amd.com>; Quan, Evan <Evan.Quan at amd.com>; Chen, Horace <Horace.Chen at amd.com>; Tuikov, Luben <Luben.Tuikov at amd.com>; Koenig, Christian <Christian.Koenig at amd.com>; Deucher, Alexander <Alexander.Deucher at amd.com>; Xiao, Jack <Jack.Xiao at amd.com>; Zhang, Hawking <Hawking.Zhang at amd.com>; Liu, Monk <Monk.Liu at amd.com>; Xu, Feifei <Feifei.Xu at amd.com>; Wang, Yang(Kevin) <KevinYang.Wang at amd.com>; Wang, YuBiao <YuBiao.Wang at amd.com>
Subject: [PATCH] drm/amdgpu: Add nv mailbox irq in soc21

Under virtualization guest needs to receive notification from host to perform reset in some cases. Add nv mailbox irq in soc21.

Signed-off-by: YuBiao Wang <YuBiao.Wang at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/soc21.c | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c b/drivers/gpu/drm/amd/amdgpu/soc21.c
index c559f9bfc36d..41b94c824717 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc21.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc21.c
@@ -43,6 +43,7 @@
 #include "soc15.h"
 #include "soc15_common.h"
 #include "soc21.h"
+#include "mxgpu_nv.h"

 static const struct amd_ip_funcs soc21_common_ip_funcs;

@@ -659,19 +660,31 @@ static int soc21_common_early_init(void *handle)
                return -EINVAL;
        }

-       if (amdgpu_sriov_vf(adev))
+       if (amdgpu_sriov_vf(adev)) {
                amdgpu_virt_init_setting(adev);
+               xgpu_nv_mailbox_set_irq_funcs(adev);
+       }

        return 0;
 }

 static int soc21_common_late_init(void *handle)  {
+       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+       if (amdgpu_sriov_vf(adev))
+               xgpu_nv_mailbox_get_irq(adev);
+
        return 0;
 }

 static int soc21_common_sw_init(void *handle)  {
+       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+       if (amdgpu_sriov_vf(adev))
+               xgpu_nv_mailbox_add_irq_id(adev);
+
        return 0;
 }

@@ -709,6 +722,9 @@ static int soc21_common_hw_fini(void *handle)
        /* disable the doorbell aperture */
        soc21_enable_doorbell_aperture(adev, false);

+       if (amdgpu_sriov_vf(adev))
+               xgpu_nv_mailbox_put_irq(adev);
+
        return 0;
 }

--
2.25.1

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