[PATCH 1/2] drm/amdkfd: correct RB_SIZE in SDMA0_QUEUE0_RB_CNTL

[Zhang, Yifan]

[AMD Official Use Only - General]

Hi Felix,

Yes, I just realized ffs start counting from 1. Sorry for the noise.

Best Regards,
Yifan

-----Original Message-----
From: Kuehling, Felix <Felix.Kuehling at amd.com> 
Sent: Friday, September 30, 2022 10:55 PM
To: Zhang, Yifan <Yifan1.Zhang at amd.com>; amd-gfx at lists.freedesktop.org
Cc: Deucher, Alexander <Alexander.Deucher at amd.com>; Ji, Ruili <Ruili.Ji at amd.com>
Subject: Re: [PATCH 1/2] drm/amdkfd: correct RB_SIZE in SDMA0_QUEUE0_RB_CNTL


Am 2022-09-30 um 02:16 schrieb Yifan Zhang:
> In SDMA0_QUEUE0_RB_CNTL, queue size is 2^RB_SIZE, not 2^(RB_SIZE +1).
>
> Signed-off-by: Yifan Zhang <yifan1.zhang at amd.com>
> ---
>   drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c | 2 +-
>   drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c | 2 +-
>   2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c 
> b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c
> index d3e2b6a599a4..03699a9ad3d9 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c
> @@ -329,7 +329,7 @@ static void update_mqd_sdma(struct mqd_manager *mm, void *mqd,
>   	struct v10_sdma_mqd *m;
>   
>   	m = get_sdma_mqd(mqd);
> -	m->sdmax_rlcx_rb_cntl = (ffs(q->queue_size / sizeof(unsigned int)) - 1)
> +	m->sdmax_rlcx_rb_cntl = order_base_2(q->queue_size / 4)

I think these two are equivalent. ffs(1) == 1. order_base_2(1) == 0. 
You're not correcting anything. You're just writing it differently.

Regards,
   Felix


>   		<< SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT |
>   		q->vmid << SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT |
>   		1 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE__SHIFT | diff --git 
> a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c 
> b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c
> index 26b53b6d673e..451fcb9bb051 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c
> @@ -329,7 +329,7 @@ static void update_mqd_sdma(struct mqd_manager *mm, void *mqd,
>   	struct v11_sdma_mqd *m;
>   
>   	m = get_sdma_mqd(mqd);
> -	m->sdmax_rlcx_rb_cntl = (ffs(q->queue_size / sizeof(unsigned int)) - 1)
> +	m->sdmax_rlcx_rb_cntl = order_base_2(q->queue_size / 4)
>   		<< SDMA0_QUEUE0_RB_CNTL__RB_SIZE__SHIFT |
>   		q->vmid << SDMA0_QUEUE0_RB_CNTL__RB_VMID__SHIFT |
>   		1 << SDMA0_QUEUE0_RB_CNTL__RPTR_WRITEBACK_ENABLE__SHIFT |