[01/23] drm/amd/display: Update PMFW z-state interface for DCN314

[Limonciello, Mario]

On 10/6/2022 16:26, Qingqing Zhuo wrote:
> From: Nicholas Kazlauskas <nicholas.kazlauskas at amd.com>
> 
> [Why]
> Request from PMFW to change the messaging format to specify whether we
> support z-state via individual bits.
> 
> [How]
> Update the args we pass in the support message.
> 
> Reviewed-by: Charlene Liu <Charlene.Liu at amd.com>
> Acked-by: Qingqing Zhuo <qingqing.zhuo at amd.com>
> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas at amd.com>

I'm aware this isn't strictly a fix, but as the firmware interface is 
changing I think we also want this to come back to 6.0.y too as products 
with DCN314 will be enabled with 6.0 and we want to make sure the 
messaging to the PMFW is correct as we enable different power management 
scenarios.

Cc: stable at vger.kernel.org # 6.0
Fixes: d5c6909e7460 ("drm/amd/display: Add DCN314 clock manager")
Reviewed-by: Mario Limonciello <mario.limonciello at amd.com>

> ---
>   .../drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.c    | 11 +++--------
>   .../gpu/drm/amd/display/dc/dcn314/dcn314_resource.c   |  3 ++-
>   2 files changed, 5 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.c
> index 897105d1c111..ef0795b14a1f 100644
> --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.c
> +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.c
> @@ -339,29 +339,24 @@ void dcn314_smu_set_zstate_support(struct clk_mgr_internal *clk_mgr, enum dcn_zs
>   	if (!clk_mgr->smu_present)
>   		return;
>   
> -	if (!clk_mgr->base.ctx->dc->debug.enable_z9_disable_interface &&
> -			(support == DCN_ZSTATE_SUPPORT_ALLOW_Z10_ONLY))
> -		support = DCN_ZSTATE_SUPPORT_DISALLOW;
> -
> -
>   	// Arg[15:0] = 8/9/0 for Z8/Z9/disallow -> existing bits
>   	// Arg[16] = Disallow Z9 -> new bit
>   	switch (support) {
>   
>   	case DCN_ZSTATE_SUPPORT_ALLOW:
>   		msg_id = VBIOSSMC_MSG_AllowZstatesEntry;
> -		param = 9;
> +		param = (1 << 10) | (1 << 9) | (1 << 8);
>   		break;
>   
>   	case DCN_ZSTATE_SUPPORT_DISALLOW:
>   		msg_id = VBIOSSMC_MSG_AllowZstatesEntry;
> -		param = 8;
> +		param = 0;
>   		break;
>   
>   
>   	case DCN_ZSTATE_SUPPORT_ALLOW_Z10_ONLY:
>   		msg_id = VBIOSSMC_MSG_AllowZstatesEntry;
> -		param = 0x00010008;
> +		param = (1 << 10);
>   		break;
>   
>   	default: //DCN_ZSTATE_SUPPORT_UNKNOWN
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
> index 70b647b9b4d3..d0ad72caead2 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
> @@ -881,7 +881,8 @@ static const struct dc_plane_cap plane_cap = {
>   };
>   
>   static const struct dc_debug_options debug_defaults_drv = {
> -	.disable_z10 = true, /*hw not support it*/
> +	.disable_z10 = false,
> +	.enable_z9_disable_interface = true,
>   	.disable_dmcu = true,
>   	.force_abm_enable = false,
>   	.timing_trace = false,