[PATCH 2/3] drm/amd/display: Enable new commit sequence only for DCN32x

Rodrigo Siqueira Rodrigo.Siqueira at amd.com
Tue Oct 11 18:11:39 UTC 2022


Change commit sequence might impact multiple ASICs; for this reason, it
is better to run it only on DCN32x for the first set of validation.
After we get more confident about this change, we should expand it to
all ASICs.

Cc: Nicholas Kazlauskas <nicholas.kazlauskas at amd.com>
Cc: Harry Wentland <harry.wentland at amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira at amd.com>
Co-developed-by: Aurabindo Pillai <aurabindo.pillai at amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai at amd.com>
---
 drivers/gpu/drm/amd/display/dc/core/dc.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index ad3aafb73cba..21d20900cfe3 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1913,6 +1913,13 @@ bool dc_commit_state(struct dc *dc, struct dc_state *context)
 	enum dc_status result = DC_ERROR_UNEXPECTED;
 	int i;
 
+	/* TODO: Enable the new commit sequence for all ASICs */
+	if (dc->ctx->asic_id.chip_family == AMDGPU_FAMILY_GC_11_0_0 ||
+	    dc->ctx->asic_id.chip_family == AMDGPU_FAMILY_GC_11_0_1) {
+		result = dc_commit_streams(dc, context->streams, context->stream_count);
+		return result == DC_OK;
+	}
+
 	if (!context_changed(dc, context))
 		return DC_OK;
 
@@ -3898,6 +3905,15 @@ void dc_commit_updates_for_stream(struct dc *dc,
 	struct dc_context *dc_ctx = dc->ctx;
 	int i, j;
 
+	/* TODO: Enable the new commit sequence for all ASICs */
+	if (dc->ctx->asic_id.chip_family == AMDGPU_FAMILY_GC_11_0_0 ||
+	    dc->ctx->asic_id.chip_family == AMDGPU_FAMILY_GC_11_0_1) {
+		dc_update_planes_and_stream(dc, srf_updates,
+					    surface_count, stream,
+					    stream_update);
+		return;
+	}
+
 	stream_status = dc_stream_get_status(stream);
 	context = dc->current_state;
 
-- 
2.35.1



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