[PATCH 2/2] drm/amdkfd: update gfx1037 Lx cache setting

Alex Deucher alexdeucher at gmail.com
Thu Oct 20 13:15:36 UTC 2022


Series is:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

On Thu, Oct 20, 2022 at 5:15 AM Prike Liang <Prike.Liang at amd.com> wrote:
>
> Update the gfx1037 L1/L2/L3 cache setting.
>
> Signed-off-by: Prike Liang <Prike.Liang at amd.com>
> ---
>  drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 53 +++++++++++++++++++++++++++
>  1 file changed, 53 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> index 960046e43b7a..6e699cb9971f 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
> @@ -795,6 +795,55 @@ static struct kfd_gpu_cache_info yellow_carp_cache_info[] = {
>         },
>  };
>
> +static struct kfd_gpu_cache_info gfx1037_cache_info[] = {
> +       {
> +               /* TCP L1 Cache per CU */
> +               .cache_size = 16,
> +               .cache_level = 1,
> +               .flags = (CRAT_CACHE_FLAGS_ENABLED |
> +                               CRAT_CACHE_FLAGS_DATA_CACHE |
> +                               CRAT_CACHE_FLAGS_SIMD_CACHE),
> +               .num_cu_shared = 1,
> +       },
> +       {
> +               /* Scalar L1 Instruction Cache per SQC */
> +               .cache_size = 32,
> +               .cache_level = 1,
> +               .flags = (CRAT_CACHE_FLAGS_ENABLED |
> +                               CRAT_CACHE_FLAGS_INST_CACHE |
> +                               CRAT_CACHE_FLAGS_SIMD_CACHE),
> +               .num_cu_shared = 2,
> +       },
> +       {
> +               /* Scalar L1 Data Cache per SQC */
> +               .cache_size = 16,
> +               .cache_level = 1,
> +               .flags = (CRAT_CACHE_FLAGS_ENABLED |
> +                               CRAT_CACHE_FLAGS_DATA_CACHE |
> +                               CRAT_CACHE_FLAGS_SIMD_CACHE),
> +               .num_cu_shared = 2,
> +       },
> +       {
> +               /* GL1 Data Cache per SA */
> +               .cache_size = 128,
> +               .cache_level = 1,
> +               .flags = (CRAT_CACHE_FLAGS_ENABLED |
> +                               CRAT_CACHE_FLAGS_DATA_CACHE |
> +                               CRAT_CACHE_FLAGS_SIMD_CACHE),
> +               .num_cu_shared = 2,
> +       },
> +       {
> +               /* L2 Data Cache per GPU (Total Tex Cache) */
> +               .cache_size = 256,
> +               .cache_level = 2,
> +               .flags = (CRAT_CACHE_FLAGS_ENABLED |
> +                               CRAT_CACHE_FLAGS_DATA_CACHE |
> +                               CRAT_CACHE_FLAGS_SIMD_CACHE),
> +               .num_cu_shared = 2,
> +       },
> +};
> +
> +
>  static struct kfd_gpu_cache_info dummy_cache_info[] = {
>         {
>                 /* TCP L1 Cache per CU */
> @@ -1565,6 +1614,10 @@ static int kfd_fill_gpu_cache_info(struct kfd_dev *kdev,
>                         pcache_info = yellow_carp_cache_info;
>                         num_of_cache_types = ARRAY_SIZE(yellow_carp_cache_info);
>                         break;
> +               case IP_VERSION(10, 3, 7):
> +                       pcache_info = gfx1037_cache_info;
> +                       num_of_cache_types = ARRAY_SIZE(gfx1037_cache_info);
> +                       break;
>                 case IP_VERSION(11, 0, 0):
>                 case IP_VERSION(11, 0, 1):
>                 case IP_VERSION(11, 0, 2):
> --
> 2.25.1
>


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