[PATCH] drm/amdgpu: Skip access GRBM_CNTL under SRIOV on gfx_v11

Alex Deucher alexdeucher at gmail.com
Tue Oct 25 13:21:07 UTC 2022


On Tue, Oct 25, 2022 at 5:06 AM Yifan Zha <Yifan.Zha at amd.com> wrote:
>
> [Why]
> GRBM_CNTL is a PF_only register on gfx_v11.
> RLCG interface will return "out of range" under SRIOV VF.
>
> [How]
> Skip access GRBM_CNTL under gfx_v11 SRIOV VF.
>
> Signed-off-by: Yifan Zha <Yifan.Zha at amd.com>

Acked-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> index e3842dc100d6..1330768df0b1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> @@ -1626,7 +1626,8 @@ static void gfx_v11_0_constants_init(struct amdgpu_device *adev)
>         u32 tmp;
>         int i;
>
> -       WREG32_FIELD15_PREREG(GC, 0, GRBM_CNTL, READ_TIMEOUT, 0xff);
> +       if (!amdgpu_sriov_vf(adev))
> +               WREG32_FIELD15_PREREG(GC, 0, GRBM_CNTL, READ_TIMEOUT, 0xff);
>
>         gfx_v11_0_setup_rb(adev);
>         gfx_v11_0_get_cu_info(adev, &adev->gfx.cu_info);
> --
> 2.25.1
>


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